Browsing "ETC[S]" byAuthor박성주

Jump to:
All A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
  • Sort by:
  • In order:
  • Results/Page
  • Authors/Record:

Showing results 1 to 30 of 36

Issue DateTitleAuthor(s)
2002-11Best-Effort 서비스를 위한 인피니밴드 비츄얼 레인 스케줄링박성주
2020-01CAN-Based Aging Monitoring Technique for Automotive ASICs With Efficient Soft Error Resilience박성주
2003-06An Efficient Buffer Allocation Technique for Virtual Lanes in InfiniBand Networks박성주
2015-05Efficient Diagnosis Technique for Aging Defects on Automotive Semiconductor Chips박성주
2020-08Efficient Low-power Scan Test Method based on Exclusive Scan and Scan Chain Reordering박성주
2016-01FlexRay 프로토콜을 이용한 차량용 SoC 고장 진단 기법박성주
2009-06Flit-Partitioned Parallel Test Technique for NoC Based SoCs박성주
2002-12A Genetic Algorithm for the Minimization of OPKFDDs박성주
2021-09Highly Efficient Test Architecture for Low Power AI Accelerators박성주
2020-02An Improved LDPC ECC based on System Level Reprogramming for MLC NAND Flash박성주
2021-11Master-Slave based test cost reduction method for DNN Accelerators박성주
2001-11A Microcode-based Memory BIST Implementing Modified March Algorithm박성주
2002-04Microcode-Based Memory BIST Implementing Modified March Algorithms박성주
2002-10A New Boundary Matching algorithm Based on Edge Detection박성주
2000-03A NEW IEEE 1149.1 BOUNDARY SCAN DESIGN FOR THE DETECTION OF DELAY DEFECTS박성주
2001-11A New Wrapped Core Linking Module for SoC Testing박성주
2000-04NPSFs를 고려한 수정된 March 알고리즘박성주
2000-01NPSFs를 고려한 수정된 March 알고리즘박성주
2000-08Optimal state assignment technique for partial scan designs박성주
2001-11P1500 compliant Microcode-based Memory BIST for Testing of Embedded Memory박성주
2000-05A Partial Scan Design by Unifying Structural Analysis and Testabilities박성주
2001-12A Partial Scan Design Unifying Structural Analysis and Testabilities박성주
2000-12PCI 버스 기반의 고속 병렬신호처리보드의 개발박성주
2021-08Reliable Test Architecture with Test Cost Reduction for Systolic based DNN accelerators박성주
2002-11A Simple Wrapped Core Linking Module for SoC Test Access박성주
2021-07Test Architecture for Systolic Array of Edge-Based AI Accelerator박성주
2021-11Time Multiplexed LBIST for in-field testing of Automotives AI Accelerators박성주
2000-01TMS320C67x 기반 병렬신호처리시스템의 설계와 성능분석박성주
2000-11부분스캔을 고려한 최적화된 상태할당 기술 개발박성주
2001-06상위·하위 수준에서 통합된 테스트 합성 기술의 개발박성주

BROWSE