Master-Slave based test cost reduction method for DNN Accelerators
- Title
- Master-Slave based test cost reduction method for DNN Accelerators
- Author
- 박성주
- Keywords
- artificial intelligence (AI) accelerators; design for testability; fault localization; scan test; testability
- Issue Date
- 2021-11
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- Citation
- IEICE ELECTRONICS EXPRESS; DEC 25 2021, 18 24, p20210425 5p.
- Abstract
- To achieve reduction in test time of accelerators, broadcasting
of test patterns is used for simultaneous testing of processing elements
(PEs). However, number of PEs tested simultaneously is limited because
of scan shift power constraint. In this letter, a Master-Slave based test
pattern application method is proposed that alleviates this scan shift power
constraint. PEs are grouped in Subcores, the tester loads the pattern into
Master PE of Subcores. From Master, test patterns are loaded into adjacent
Slave PEs of Subcore. By limiting scan shift power to one Master PE per
Subcore, more PEs are allowed to be tested simultaneously.
- URI
- https://www.jstage.jst.go.jp/article/elex/18/24/18_18.20210425/_articlehttps://repository.hanyang.ac.kr/handle/20.500.11754/169837
- ISSN
- 13492543
- DOI
- 10.1587/elex.18.20210425
- Appears in Collections:
- ETC[S] > 연구정보
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