2008-05 | Low Cost Scan Test for IEEE 1500-Based SoC | 박성주 |
2016-10 | Low Power Scan Chain Reordering Method with Limited Routing Congestion for Code-based Test Data Compression | 박성주 |
2008-05 | Low-cost scan test for IEEE-1500-Based SoC | 박성주 |
2002-04 | Microcode-based memory BIST implementing modified march algorithms | 박성주 |
2011-04 | Multiple cell upsets tolerant content-addressable memory | 박성주 |
2004-07 | A New Design of High Speed Parallel CRC Generator | 박성주 |
2004-10 | A New State Assignment Technique for Testing and Low Power | 박성주 |
2003-02 | A New State Assignment Technique for Testing and Low Power | 박성주 |
2004-06 | A New State Assignment Technique for Testing and Low Power | 박성주 |
2004-02 | A new synthesis technique of sequential circuits for low power and testing | 박성주 |
2017-07 | On Diagnosing the Aging Level of Automotive Semiconductor Devices | 박성주 |
2010-07 | On-Chip Support for NoC-Based SoC Debugging | 박성주 |
2008-06 | Optimal SoC Test Interface for Wafer and Final Tests | 박성주 |
2006-10 | Parallel CRC Logic Optimization Algorithm for High Speed Communication Systems | 박성주 |
2009-11 | Parallel test method for NoC-based SoCs | 박성주 |
2011-04 | Performance Improvement by Logic Sharing on Using Unused Spare Columns for Memory EC | 박성주 |
2004-10 | A Reconfigurable Test Access Mechanism for Embedded Core Test | 박성주 |
2011-08 | Redundancy TSV 연결 테스트를 위한 래퍼셀 설계 | 박성주 |
2014-01 | Reliability issues for automobile SoCs | 박성주 |
2015-11 | SCAN-PUF: PUF Elements Selection Methods for Viable IC Identification | 박성주 |
2002-11 | A simple wrapped core linking module for SoC test access | 박성주 |
2016-10 | Test Access Mechanism for Automotive Chips through Vehicular Control Networks | 박성주 |
2019-02 | Time Division Multiplexing based Test Access for Stacked ICs | 박성주 |
2018-08 | Time-Multiplexed 1687-Network for Test Cost Reduction | 박성주 |
2016-07 | Time-multiplexed test access architecture for stacked integrated circuits | 박성주 |
2013-01 | TSV 기반 3D IC Pre/Post Bond 테스트를 위한IEEE 1500 래퍼 설계기술 | 박성주 |
2003-03 | 계층적 SoC 테스트 접근을 위한 명령어 기반 코아 연결 모듈의 설계 | 박성주 |
2003-01 | 계층적 SoC 테스트 접근을위한 플래그 기반 코아 연결 모듈의 설계 | 박성주 |
2004-09 | 고성능 병렬 CRC 생성기 설계 | 박성주 |
2005-07 | 논리 최적화 기법을 이용한 병렬 CRC 회로 설계 | 박성주 |