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COLLEGE OF ENGINEERING[S](공과대학)
ELECTRONIC ENGINEERING(융합전자공학부)
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Results 11-20 of 33 (Search time: 0.002 seconds).
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Issue Date
Title
Author(s)
2012-08
A Low-Voltage, Low-Power, and Low-Noise UWB Mixer Using Bulk-Injection and Switched Biasing Techniques
윤태열
2012-11
Measurement of Intersymbol Interference Jitter by Fractional Oversampling for Adaptive Equalization
유창식
2014-05
Data and edge decision feedback equalizer with ˃ 1.0-UI timing margin for both data and edge samples
유창식
2014-01
Intra-panel interface with clock-embedded differential signalling for large size digital television
유창식
2014-06
A 1.5-5.0 Gb/s clock and data recovery circuit with dual-PFD phase-rotating phase locked loop
유창식
2014-06
A 100-kS/s 8.3-ENOB 1.7-mu W Time-Domain Analog-to-Digital Converter
유창식
2018-11
Continuous-time linear equalizer with automatic boosting gain adaptation and input offset cancellation
유창식
2013-08
A 6-Gb/s Differential Voltage Mode Driver with Independent Control of Output Impedance and Pre-Emphasis Level
유창식
2013-11
Skew Compensation Technique for Source-Synchronous Parallel DRAM Interface
유창식
2015-04
A 6-Gbps/lane receiver for a clock-forwarded link in 65-nm CMOS process
유창식
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유창식
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윤태열
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최재훈
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한재덕
-Subject
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analog-to-digital converter (ADC)
3
clock and data recovery (CDR)
2
Analog-to-digital converter (ADC)
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Buck converter
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continuous-time (CT)
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dc-dc converter
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hearing aid
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High-definition multimedia interf...
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offset cancellation
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phase locked loop (PLL)
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