Intra-panel interface with clock-embedded differential signalling for large size digital television

Abstract

For large size digital television, an intra-panel interface scheme with clock-embedded differential signalling is developed which connects a timing controller and column data driver at 2.0?Gbps. A two-wire differential data channel has tri-level and clock information is embedded in it. Embedded clocking eliminates the skew between data channel and clock, which makes the clock-data recovery very simple. A prototype chip has been implemented in a standard 45-nm CMOS technology.