Efficient loop-back testing of on-chip ADCs and DACs.

Abstract

This paper presents an efficient approach to testing on-chip analog to digital converters (ADCs) and digital to analog converters (DACs) in loop-back mode. On-chip digital signal processing units can be used to generate stimuli. With this methodology, go/no-go tests as well as characterization of the individual ADCs and DACs are possible. The proposed approach is simple and overcomes the low parametric fault coverage of conventional loop-back tests. Simulations on a Matlab model of loop-backed converters are presented to validate the feasibility of the method.