Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 노정진 | - |
dc.date.accessioned | 2020-10-29T05:50:38Z | - |
dc.date.available | 2020-10-29T05:50:38Z | - |
dc.date.issued | 2003-01 | - |
dc.identifier.citation | Proceedings of the ASP-DAC 2003. Asia and South Pacific. page.651-656 | en_US |
dc.identifier.isbn | 0-7803-7659-5 | - |
dc.identifier.isbn | 978-0-7803-7659-5 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/1195103?arnumber=1195103&SID=EBSCO:edseee | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/155077 | - |
dc.description.abstract | This paper presents an efficient approach to testing on-chip analog to digital converters (ADCs) and digital to analog converters (DACs) in loop-back mode. On-chip digital signal processing units can be used to generate stimuli. With this methodology, go/no-go tests as well as characterization of the individual ADCs and DACs are possible. The proposed approach is simple and overcomes the low parametric fault coverage of conventional loop-back tests. Simulations on a Matlab model of loop-backed converters are presented to validate the feasibility of the method. | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | IEEE | en_US |
dc.title | Efficient loop-back testing of on-chip ADCs and DACs. | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/ASPDAC.2003.1195103 | - |
dc.contributor.googleauthor | Yu, Hak-soo | - |
dc.contributor.googleauthor | Abraham, J.A. | - |
dc.contributor.googleauthor | Hwang, Sungbae | - |
dc.contributor.googleauthor | Roh, Jeongjin | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | jroh | - |
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