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Performance Improvement of Memory Error Correcting Code by Utilizing Spare Memory Cells.

Title
Performance Improvement of Memory Error Correcting Code by Utilizing Spare Memory Cells.
Author
조준형
Advisor(s)
Sung-ju Park
Issue Date
2015-02
Publisher
한양대학교
Degree
Master
Abstract
As the use of portable devices increases, the usage of NAND flash memory The degree of integration of the NAND flash memory has also increased exponentially. To increase even failure occurrence frequency in accordance with an increase in the memory capacityvarious Error Correcting Code (ECC) techniques have been. his, reus the spare cell that not used after the production of the memory. As you increase the ECC check bit, the failure rate is reduced, the treatment time was confirmed to be reduced.
URI
https://repository.hanyang.ac.kr/handle/20.500.11754/128688http://hanyang.dcollection.net/common/orgView/200000425849
Appears in Collections:
GRADUATE SCHOOL[S](대학원) > COMPUTER SCIENCE & ENGINEERING(컴퓨터공학과) > Theses (Master)
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