Failure Signature Analysis of Power-opens in IC Chips

Abstract

The fast development of VLSI technology brings more and more power pins in addition to signal pins. The trend of the total package pin count in advanced microprocessors has been reported by the International Technology Roadmap for Semiconductors. The pin number has been 5894 in 2014 and will reach to 9605 in 2024. The large amount of pins will cause more complex issues in package design and test. During package manufacturing process, open defects of power and ground pins may cause more power supply noise and degrade the power network performance. Boundary-Scan technology is able to test the signal interconnects, but generally does not include open defects on the power and ground pins. Open defects in power pins can only be diagnosed indirectly, and these diagnoses are a challenging task in failure analysis due to the failure signature’s aliasing to other issues. Open defects cannot be detected by traditional DC-type test methods and can remain a potential risk in stressful device operation. While most chips are considered with enough pin redundancy, the chips with power-open defect could be shipped to a customer. In this work, error signatures in power open faults are experimentally probed to better understand electrical signatures induced by power-open. The power open faults are intentionally injected into a DDR3 SDRAM test platform. The power network inside the DDR3 SDRAM is experimentally found to be asymmetrical. Power-open defects in one power pin produce a range of power noise (0– 65 mV), depending on the location of the power pin. And as the number of opened power pins increased, power noise generally increased. In addition, A SPICE simulation was conducted to The Spice Simulation was also conducted to recreate and validate observations from test platform experiments. The Spice Simulation also showed that when power distribution is not well-designed, the effect of power-opens could be more widely varying depending on impedance dependency among power pins.