A Low-Power Single-Ended 11-bit SA-ADC with 1 V Supply Voltage and 2 V Input Voltage Range for CMOS Image Sensors
- Title
- A Low-Power Single-Ended 11-bit SA-ADC with 1 V Supply Voltage and 2 V Input Voltage Range for CMOS Image Sensors
- Author
- 권오경
- Keywords
- CMOS image sensor; successive approximation ADC; low supply voltage ADC; low power ADC
- Issue Date
- 2016-10
- Publisher
- Institute of Electrical and Electronics Engineers
- Citation
- 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Page. 410-413
- Abstract
- We propose a low-power single-ended 11-bit successive approximation analog-to-digital converter (SA-ADC) for CMOS image sensors. The proposed SA-ADC uses a supply voltage of 1 V instead of 2 V for a 2 V input voltage range in order to reduce power consumption. The proposed ADC reduces the conversion time and area by sampling the input signal only twice and converting it to the most significant bit (MSB) and lower 10-bit without any additional analog circuit. A test chip with the proposed SA-ADC was fabricated using a 0.18 μm CMOS process technology. The measurement results show that the total power consumption of the proposed SA-ADC is 9.0 μW. The static and dynamic power consumptions using a 1 V supply voltage are reduced by 54% and 76%, respectively, compared with those using a 2 V supply voltage. In addition, the proposed SA-ADC achieves a short conversion time of 6.5 μs and occupies a small area of 320 μm × 270 μm. The measured DNL and INL are -0.53/+0.57 LSB and -0.91/+0.71 LSB, respectively.
- URI
- https://ieeexplore.ieee.org/document/7803989?arnumber=7803989&SID=EBSCO:edseeehttps://repository.hanyang.ac.kr/handle/20.500.11754/99117
- ISBN
- 978-1-5090-1570-2; 978-1-5090-1569-6
- DOI
- 10.1109/APCCAS.2016.7803989
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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