A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience
- Title
- A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience
- Author
- 백상현
- Keywords
- Flip-Flop; Quatro; radiation hardness by design (RHBD); soft error; DEPENDENCE; 65 NM CMOS; SINGLE EVENT UPSETS; DESIGN; TECHNOLOGY; TOLERANT; LATCH; SEU; PERFORMANCE; SRAMS
- Issue Date
- 2017-05
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Citation
- IEEE TRANSACTIONS ON NUCLEAR SCIENCE, v. 64, No. 6, Page. 1554-1561
- Abstract
- A flip-flop circuit hardened against soft errors is presented in this paper. This design is an improved version of Quatro for further enhanced soft-error resilience by integrating the guard-gate technique. The proposed design, as well as reference Quatro and regular flip-flops, was implemented and manufactured in a 65-nm CMOS bulk technology. Experimental characterization results of their alpha and heavy ions soft-error rates verified the superior hardening performance of the proposed design over the other two circuits.
- URI
- https://ieeexplore.ieee.org/abstract/document/7927472/https://repository.hanyang.ac.kr/handle/20.500.11754/72252
- ISSN
- 0018-9499; 1558-1578
- DOI
- 10.1109/TNS.2017.2704062
- Appears in Collections:
- COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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