STT-MRAM; write-operation; reference cell; power saving
Issue Date
2016-02
Publisher
IEEK PUBLICATION CENTER
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v. 16, NO 1, Page. 23-30
Abstract
We report a STT-MRAM write-scheme, in which the length of the write-pulse is determined dynamically by sensing the status of MTJ cells. The proposed scheme can reduce the power consumption by eliminating unnecessary writing current after the switching has occurred. We also propose a reference cell design, which is optimized for the use in write-circuits. The performance of the proposed circuit was verified by SPICE level simulations of the circuit implemented in a 0.13 mu m CMOS process.