High-speed two-step single-slope ADC using multi-sampling with partial conversion
- Title
- High-speed two-step single-slope ADC using multi-sampling with partial conversion
- Author
- 권오경
- Keywords
- analogue-digital conversion; sampling methods
- Issue Date
- 2015-02
- Publisher
- INST ENGINEERING TECHNOLOGY-IET
- Citation
- ELECTRONICS LETTERS, v. 51, NO 4, Page. 325-326
- Abstract
- A multi-sampling method with partial conversion for a low-noise and high-speed analogue-to-digital converter (ADC) is proposed. The proposed multi-sampling method divides the total bits of an ADC into upper and lower bits, and only repeats the lower bit conversion using the two-step ADC architecture. This partial conversion decreases the A/D conversion time, along with noise reduction by multi-sampling. The proposed method with pseudo-multi-sampling or correlated multi-sampling for lower bit conversion reduces the number of clock cycles by 99.7 or 98.8%, respectively, compared with the conventional multi-sampling method.
- URI
- http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7042418&tag=1http://hdl.handle.net/20.500.11754/22369
- ISSN
- 0013-5194; 1350-911X
- DOI
- 10.1049/el.2014.3436
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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