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Microcode-based memory BIST implementing modified march algorithms

Title
Microcode-based memory BIST implementing modified march algorithms
Author
오희국
Keywords
memory BIST; address fault; microcode; march test; LFSR
Issue Date
2002-04
Publisher
한국물리학회
Citation
Journal of the Korean Physical Society, v. 40, NO. 4, Page. 749-753
Abstract
A new microcode-based BIST (built-in self test) circuitry for embedded memory components is proposed in this paper. The memory BIST implements march algorithms which are slightly modified by adopting degree of freedom concept to detect address decoder open faults on top of conventional stuck faults. Furthermore, it is shown that the BIST-modified march can capture a few neighborhood pattern sensitive faults coupled with the cellular automata address generator and patterns. The proposed microcode-based memory BIST lends itself to performing different combinations of march and retention tests with less microcode storage than the other approaches.
URI
http://wmdbk21.hanyang.ac.kr/wmdbk21/Sjpark/jp749.pdfhttps://repository.hanyang.ac.kr/handle/20.500.11754/185890
ISSN
0374-4884;1976-8524
DOI
10.3938/jkps.40.749
Appears in Collections:
ETC[S] > ETC
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