Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 홍주유 | - |
dc.date.accessioned | 2023-07-24T01:15:26Z | - |
dc.date.available | 2023-07-24T01:15:26Z | - |
dc.date.issued | 2009-04 | - |
dc.identifier.citation | Proceedings of SPIE - The International Society for Optical Engineering, v. 7273, article no. 72732D, | - |
dc.identifier.issn | 0277-786X | - |
dc.identifier.uri | https://www.spiedigitallibrary.org/conference-proceedings-of-spie/7273/1/Reduction-of-line-width-and-edge-roughness-by-resist-reflow/10.1117/12.814108.short | en_US |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/184196 | - |
dc.description.abstract | Extreme ultra-violet lithography (EUVL) has been prepared for next generation lithography for several years. We could get sub-22 nm line and space (L/S) pattern using EUVL, but there are still some problems such as roughness, sensitivity, and resolution. According to 2007 ITRS roadmap, line edge roughness (LER) has to be below 1.9 nm to get a 22 nm node, but it is too difficult to control line width roughness (LWR) because line width is determined by not only the post exposure bake (PEB) time, temperature and acid diffusion length, but also the component and size of the resist. A new method is suggested to reduce the roughness. The surface roughness can be smoothed by applying the resist reflow process (RRP) for the developed resist. We made resist profile which has surface roughness by applying exposure, PEB and development process for line and space pattern. The surface roughness is calculated by changing parameters such as the protected ratio of resin. The PEB time is also varied. We compared difference between 1:1 L/S and 1:3 L/S pattern for 22 nm. Developed resist baked above the glass transition temperature will flow and the surface will be smoothed. As a result, LER and LWR will be much smaller after RRP. The result shows that the decreasing ratio of LER due to RRP is larger when initial LER is large. We believe that current ∼ 5 nm LWR can be smoothed to ∼ 1 nm by using RRP after develop. ©2009 SPIE. | - |
dc.language | en | - |
dc.subject | 22 nm node | - |
dc.subject | Line edge roughness | - |
dc.subject | Line width roughness | - |
dc.subject | Resist reflow process | - |
dc.subject | Surface roughness | - |
dc.title | Reduction of line width and edge roughness by resist reflow process for extreme ultra-violet lithography | - |
dc.type | Article | - |
dc.relation.volume | 7273 | - |
dc.identifier.doi | 10.1117/12.814108 | - |
dc.relation.journal | Proceedings of SPIE - The International Society for Optical Engineering | - |
dc.contributor.googleauthor | Cho, In Wook | - |
dc.contributor.googleauthor | Park, Joon-Min | - |
dc.contributor.googleauthor | Kim, Hyunsu | - |
dc.contributor.googleauthor | Hong, Joo-Yoo | - |
dc.contributor.googleauthor | Kim, Seong-Sue | - |
dc.contributor.googleauthor | Cho, Han-Ku | - |
dc.contributor.googleauthor | Oh, Hye-Keun | - |
dc.sector.campus | E | - |
dc.sector.daehak | 과학기술융합대학 | - |
dc.sector.department | 응용물리학과 | - |
dc.identifier.pid | jhong | - |
dc.identifier.article | 72732D | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.