An Output Capacitorless Low-Dropout Regulator With a Low-V-DD Inverting Buffer for the Mobile Application
- Title
- An Output Capacitorless Low-Dropout Regulator With a Low-V-DD Inverting Buffer for the Mobile Application
- Author
- 이병훈
- Keywords
- Buffer; capacitorless; low-dropout regulator (LDO); low-V-DD structure; power supply rejection ratio (PSRR)
- Issue Date
- 2020-10
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Citation
- IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, v. 67, no. 10, page. 8931-8935
- Abstract
- To provide power to the latest mobile applications that use functions with heavy loads, in this letter, we present a capacitorless low-dropout regulator (LDO) that supplies a large load current up to 600 mA. The proposed buffer and the feedforward paths are used to provide a stable operation and fast response along with a large load current. Owing to these schemes, the proposed LDO has a high unity gain frequency of 2.85 MHz at 100 mA with a total compensation capacitance of 5.1 pF. In addition, the LDO operates under a wide input voltage range of 1.5-5.0 V owing to the low-VDD structure. Also, a power supply rejection ratio was -52 dB at 100 kHz. The chip was implemented with a small size of 0.082 mm 2 using the I/O devices of a 0.18 μm CMOS process with a minimum length of 0.5 μm.
- URI
- https://ieeexplore.ieee.org/document/8894689https://repository.hanyang.ac.kr/handle/20.500.11754/172068
- ISSN
- 0278-0046; 1557-9948
- DOI
- 10.1109/TIE.2019.2951296
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRICAL AND BIOMEDICAL ENGINEERING(전기·생체공학부) > Articles
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