Hardware Cost Estimation Techniques for C-Level Description

Abstract

Recent trends in the hardware/software codesign and architectural exploration bring us the need to develop sophisticated high-level estimation tools. This paper describes hardware cost estimation techniques for descriptions written in C language. This approach estimates the area and performance of the system described in standard ANSI C language to be implemented in hardware. Experimental results show that this approach has some errors but gives the designer useful information concerning the hardware for architectural exploration and hardware/software partitioning in high-level codesign.