Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 박성주 | - |
dc.date.accessioned | 2022-04-10T23:53:40Z | - |
dc.date.available | 2022-04-10T23:53:40Z | - |
dc.date.issued | 2021-11 | - |
dc.identifier.citation | IEICE ELECTRONICS EXPRESS; DEC 25 2021, 18 24, p20210425 5p. | en_US |
dc.identifier.issn | 13492543 | - |
dc.identifier.uri | https://www.jstage.jst.go.jp/article/elex/18/24/18_18.20210425/_article | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/169837 | - |
dc.description.abstract | To achieve reduction in test time of accelerators, broadcasting of test patterns is used for simultaneous testing of processing elements (PEs). However, number of PEs tested simultaneously is limited because of scan shift power constraint. In this letter, a Master-Slave based test pattern application method is proposed that alleviates this scan shift power constraint. PEs are grouped in Subcores, the tester loads the pattern into Master PE of Subcores. From Master, test patterns are loaded into adjacent Slave PEs of Subcore. By limiting scan shift power to one Master PE per Subcore, more PEs are allowed to be tested simultaneously. | en_US |
dc.description.sponsorship | This work was supported in part by the Higher Education Commission, Govt. of Pakistan, under the scholarship program titled “Faculty Development of UESTPs/UETs”. This research was also supported by the BK21 FOUR (Fostering Outstanding Universities for Research) funded by the Ministry of Education (MOE, Korea) and National Research Foundation of Korea (NRF). | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | en_US |
dc.subject | artificial intelligence (AI) accelerators | en_US |
dc.subject | design for testability | en_US |
dc.subject | fault localization | en_US |
dc.subject | scan test | en_US |
dc.subject | testability | en_US |
dc.title | Master-Slave based test cost reduction method for DNN Accelerators | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1587/elex.18.20210425 | - |
dc.relation.page | 96700-96704 | - |
dc.relation.journal | IEICE ELECTRONICS EXPRESS | - |
dc.contributor.googleauthor | Solangi, Umair Saeed | - |
dc.contributor.googleauthor | Ibtesam, Muhammad | - |
dc.contributor.googleauthor | Park, Sungju | - |
dc.relation.code | 2021001322 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF COMPUTING[E] | - |
dc.sector.department | SCHOOL OF COMPUTER SCIENCE | - |
dc.identifier.pid | paksj | - |
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