A New Wrapped Core Linking Module for SoC Testing
- Title
- A New Wrapped Core Linking Module for SoC Testing
- Author
- 박성주
- Issue Date
- 2001-11
- Publisher
- 대한전자공학회
- Citation
- 대한전자공학회 기타 간행물, v. 1, page. 137-142
- Abstract
- For a System-on-a-Chip(SoC) comprised of multiple IP cores with IEEE 1149.1 boundary scan design, various design techniques have been proposed to provide diverse test link configurations. In this paper, we present a new design of Wrapped Core Linking Module(WCLM) that enables systematic integration of 1149.1 JTAG'd cores and PI500 wrapped cores. The design preserves compatibility with standards and scalablity for hierarchical access.
- URI
- https://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE02012649?https://repository.hanyang.ac.kr/handle/20.500.11754/161039
- Appears in Collections:
- ETC[S] > 연구정보
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