A Compact Multi-Layer IC Package Model for Efficient Simulation, Analysis, and Design of High-Performance VLSI Circuits
- Title
- A Compact Multi-Layer IC Package Model for Efficient Simulation, Analysis, and Design of High-Performance VLSI Circuits
- Author
- 어영선
- Keywords
- Circuit model; ground plane; IC package; multilayer package; partial plane model; power plane; signal integriy; simultaneous switching noise
- Issue Date
- 2003-11
- Publisher
- IEEE
- Citation
- IEEE Transactions on Advanced Packaging, v. 26, issue. 4, page. 392-401
- Abstract
- A multilayered integrated circuit (IC) package structure is composed of many signal layers, power layers, and ground layers. Particularly, the whole planes are assigned for the power and ground of the system. Accordingly, the generic circuit representation of such a complicated multilayer IC package becomes too complicated to efficiently evaluate its electrical performance. In this work, a novel compact package circuit model for the efficient simulation and analysis of such complicated IC packages is presented. Unlike the conventional models, current distributions within the package are modeled by introducing a compact partial plane circuit model. Thus, the proposed package model is much simpler than the conventional generic circuit models, while its accuracy is preserved. Thereby, todays complicated IC packages can be efficiently evaluated and analyzed. Its accuracy and efficiency are verified by benchmarking it with a conventional generic package circuit model
- URI
- https://ieeexplore.ieee.org/abstract/document/1257434https://repository.hanyang.ac.kr/handle/20.500.11754/156417
- ISSN
- 1521-3323; 1557-9980
- DOI
- 10.1109/TADVP.2003.821093
- Appears in Collections:
- COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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