Time-Based Digital LDO Regualtor with Fractionally Controlled Power Transistor Strength and Fast Transient Response

Abstract

The number of enabled power transistors and their ON-time of a digital low-dropout (LDO) regulator are controlled by a time-based controller. By the time-based controller consisting of two voltage-controlled oscillators (VCO) and a phase-detecting switch driver, the effective number of enabled power transistors and therefore their strength can be fractionally controlled. The transient response is greatly improved by a transient detector which selectively disables one of the two VCOs during a transient condition. At steady state, the number of switching power transistor is either zero or one, minimizing the ripple of the output voltage. Implemented in a 65 nm CMOS technology, the time-based digital LDO regulator can provide 0.5 ~ 1.1V output from 0.9 ~ 1.2V input. For the maximum load current of 19 mA, the peak current efficiency is 99.3 %. For both the step-up and -down changes of the load current by 3 mA, the voltage level of the output is stabilized in less than 90 ns.