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Hot-Carrier Degradation Estimation of a Silicon-on-Insulator Tunneling FET Using Ambipolar Characteristics

Title
Hot-Carrier Degradation Estimation of a Silicon-on-Insulator Tunneling FET Using Ambipolar Characteristics
Author
최창환
Keywords
Tunneling FET; ambipolar current; hot-carrier stress; interface degradation; relaxation; degradation region
Issue Date
2019-11
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE ELECTRON DEVICE LETTERS, v. 40, no. 11, Page. 1716-1719
Abstract
The unique degradation behavior of a tunneling field-effect transistor (TFET) under hot-carrier injection (HCI) stress has been previously investigated. However, while the source side (p(+)/p junction) of degradation (due to HCI stress) has been extensively studied, the drain side (p/n(+) junction) has not been investigated yet. Our study revealed that both bulk oxide and interfacial layer degradation occurred at the drain side, while an interfacial layer degradation was dominant at the source side at 300 K. This evidences a unique degradation mechanism of the tunneling FET.
URI
https://ieeexplore.ieee.org/document/8846059https://repository.hanyang.ac.kr/handle/20.500.11754/153855
ISSN
0741-3106; 1558-0563
DOI
10.1109/LED.2019.2942837
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > MATERIALS SCIENCE AND ENGINEERING(신소재공학부) > Articles
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