Si 과 GaAs 의 전기화학적 식각에 대한 연구

Abstract

Since porous semiconductors have wide applications such as sensors, optical devices and solar cells, remarkable efforts have been devoted to develop various technologies to fabricate porous structure with wealthy morphologies. Electrochemical etching has been proved as a promising and cost-effective method to produce pores in semiconductors. Here we symmetrically investigated electrochemical etching of n-type Si and GaAs in HF and HCl electrolyte respectively. In case of silicon, a broad range of pores have been fabricated with diameters varying from 200 nm to 4 μm. The existence of space charge region constrains the porosity. Post KOH chemical etching could constantly increase the porosity, silicon square macropore array and free-standing pillars were obtained by immersing macroporous silicon into KOH solution. We symmetrically investigated anodic etching of GaAs in aqueous HCl electrolyte on both smooth and textured surfaces. After pore formation potential (PFP), the peak potential Vps in I-V curve delimited electrochemical etching into two regions: Pore growth region, tetrahedron-like pore region/Arsenic oxide microcrystal formation region. Due to small radius of groove tip, the groove structure greatly enhanced the current density, generating more uniform pore formation with higher porosity at low potential. Under high potential, the groove structure induced strong focusing effect, resulting in transition from tetrahedron-like pores into octahedral pores grew in <100> direction at 6V.