Design and Analysis of Scalable 2-D Optical Orthogonal Codes and LDPC Codes

Abstract

An optical orthogonal code (OOC) is a collection of binary sequences with good correlation properties which are important factors of determining the capacity of optical code division multiple access (OCDMA) systems. OOCs have also been used in frequency-hopping spread-spectrum communicatons, radar, neuromorphic networks, etc. In this dissertation, the research has been focused on 2-dimensional (2-D) OOCs with $\lambda_a \leq 1$ and $\lambda_c \leq 1$, in which the notation of the code is abbriviated to $C(m \times n, w, 0, 1)$. We reintroduce the well known single pulse per row (SPR) codes and propose combinatorial and search construction methods of $2$-D multi-weight OOCs with autocorrelation $\lambda_a=0$ and crosscorrelation $\lambda_c=1$ using SPR codes, called multi-weight single or no pulse per row (MSNPR) codes. Also, upper bounds on the size of SPR and MSNPR codes are derived and it is shown in examples that the proposed construction methods can generate MSNPR codes which almost meet the upper bound on the size of MSNPR codes. The performance of MSNPR codes is compared to those of other OOCs in terms of the bit error rate (BER) and evaluated using blocking probability. Simulation results show that MSNPR codes and have nearly identical BER performance as general OOCs and have better performance and larger cardinality than EPC/OCS codes. It is also demonstrated that the MSNPR codes can be flexibly constructed for various applications, providing the scalability to optical CDMA systems.

Low-density parity-check (LDPC) codes, proposed by Gallager in 1962, have been actively studied because they show the capacity-approaching performance with feasible decoding complexity. Also, to enable linear-time encoding, many repeat-accumulate type (RA-type) LDPC codes have been proposed. An LDPC code is specified by sparse parity-check matrix $H$ that can be represented by a Tanner graph, which shows the relationship between codeword bits and parity checks. A Tanner graph of finite-length LDPC codes contains a large number of cycles and the presence of short cycles can introduce a noticeable performance loss. In general, random interleavers have many short cycles and in order to improve the performance of LDPC codes, interleavers of LDPC codes are designed to remove short cycles.

For wireless communication systems, hybrid automatic repeat request (HARQ) and adaptive modulation and coding (AMC) are required to increase the system throughput and hence rate-compatible error-correcting codes are indispensable. Among many rate control schemes, puncturing is widely used to achieve high rates for LDPC codes. Tanner graph of punctured RA-type LDPC codes is simplified by removing punctured parity nodes and merging check nodes, that is called the check-node merged Tanner graph. In this dissertation, the cycle structure of punctured RA-type LDPC codes is analyzed using check-node merged Tanner graph and based on these results, simple interleavers are constructed to have good memory efficiency and remove short cycles. Simulation results show that the proposed interleavers outperform random and $S$-random interleavers.

Last decade, many properties of LDPC codes have been well studied, yet the error floor problem has remained relatively unclear and the error floor behavior of LDPC codes is a big concern for data storage devices and optical communication systems. The most difficult task of determining the error floor of LDPC codes in the presence of additive white Gaussian noise (AWGN) is locating the dominant error events that contribute most of the error probability at high SNR. In the case of the AWGN channel, Richardson pointed out that the decoder performance is governed by a few most likely error events related to certain topological structures in the Tanner graph of the code, called \emph{trapping sets}. In this dissertation, we explain cycles and trapping sets. Also, we found some small trapping sets from computer simulation and propose iterative power allocation scheme which can reduce effects of small trapping sets and is able to provide low error floor of LDPC codes at high SNR.