High-Performance CMOS Active Mixers for Wireless Communication Systems

Abstract

this is a result of the integration of the RF transconductance stage and the LO switching stage into a single transistor that is able to eliminate parasitic effects. Moreover, since the bulk-injection transistors of the mixer are designed to operate in the sub-threshold region, current dissipation is reduced. A switched biasing technique for the tail current source, in place of static biasing, is adopted to reduce noise. The effects of modulated input signals, such as AM and FM, are simulated and measured to demonstrate the robustness of the switched biasing technique. The proposed mixer offers a measured conversion gain from 7.6 to 9.9 dB, a noise figure from 11.7 to 13.9 dB, and IIP3 from -10 to -15.5 dBm, over 2.4 to 11.9 GHz, while consuming only 0.88 mW from a 0.8 V supply voltage. The chip size including the test pads is 0.62 × 0.58 mm2 using a 0.18-μm RF CMOS process. Third, a low-noise and high-gain down-conversion mixer fabricated via a 0.13 μm CMOS process is presented in Chapter 4. The proposed mixer is based on the folded-type topology and includes an inverter transconductance, a switched biasing circuit and an LO switch, which improve the conversion gain and noise figure. Moreover, the switched biasing circuit is combined with a current bleeding circuit to reduce power consumption and flicker noise. A conversion gain of 24.75 dB and a noise figure of 4.59 dB were achieved at 2.1 GHz of RF while consuming 1.93 mW from a supply voltage of 1.0 V. Finally, a noise reduction technique for an active CMOS mixer is presented in Chapter 5. The proposed technique uses negative feedback between mixer’s output and tail current source to simultaneously reduce flicker noise and white noise caused by LO switching stage. From an analysis of the proposed negative feedback circuit, it is revealed that flicker noise is reduced by about 10 dB. It is also demonstrated that white noise is quite reduced from the theoretical analysis. To examine the proposed technique, a Gilbert-cell mixer is fabricated using a 0.13-μm CMOS process. The proposed mixer achieves a flicker noise of 29 dB at 10 kHz, which is a reduction of 10.9 dB compared with that of the conventional structure, without degradation of any performance of the mixer.; This dissertation deals with implementation of various high-performance active mixers, namely i) feedforward linearity-improved mixer capable of providing best figure-of-merit (FOM), ii) ultra-wideband (UWB) mixer using bulk-injection and switched biasing techniques, iii) low-noise and high-gain mixer combining switched-biasing and current-bleeding techniques, and iv) a noise reduction technique for an active mixer using negative feedback. The design details of the proposed circuits are discussed, along with simulation and measurement results. First, Chapter 2 presents a new linearity-improvement feedforward transconductance stage using inductive source-degeneration amplifiers. The proposed technique is applied to a CMOS RF mixer based on a folded-type topology. Feedforward compensation is achieved by cancelling the third-order transconductance terms between the inverter and auxiliary amplifiers. From a new theoretical analysis of the nonlinearities of the proposed circuit, the third-order intermodulation distortion (IMD3) is eliminated by controlling the values of the source-degeneration inductances. The proposed mixer achieves a third-order input intercept point (IIP3) of -5.24 dBm, which is an improvement of 6.3 dB compared with that of the conventional structure, and has the highest FOM among other linearity improved mixers that have been previously reported. Second, Chapter 3 describes a low-voltage, low-power, low-noise, and ultra-wideband mixer using bulk-injection and switched biasing techniques. The bulk-injection technique is implemented for a low supply voltage thus resulting in low power consumption. This technique also allows for a flat conversion gain over a wide range of frequencies covering the full UWB band