Performance Analysis of Phase Modulation with Phase Error

Abstract

Single-level or multi-level digital phase modulation such as M-ary phase shift keying (MPSK), and amplitude and phase shift keying (APSK) is widely used in satellite and mobile communication systems. Because digital phase modulation is a method of conveying information by modulating the phase of a transmit signal, the bit error rate (BER) performance is especially sensitive to phase error and it is more critical to high-order modulation. Furthermore, in recent wireless communication systems, because the speed of vehicles and terminals has increased rapidly, large Doppler spread occurs. In this case, the phase locked loop (PLL) bandwidth should be designed over a wide range. Then signal-to-noise power ratio (SNR) in the loop bandwidth decreases, and the variance of phase error increases. On the other side, large Doppler spread can cause imperfect channel estimation and it also leads to significant phase error. Therefore, for analytic purposes, it is important to investigate the effect of the phase error on the BER performance of digital phase modulation. To analyze the BER performance for various phase error cases, first, we have to derive a BER expression for a fixed phase error, which denotes conditional error probability for a given phase error. In general, because a phase error is considered as a random variable, when a random phase error caused by PLL or imperfect channel estimation occurs, an average BER is obtained by integrating the conditional error probability for a given phase error against the probability density function (PDF) of the phase error. The random phase error not only degrades BER performance, but also results in an irreducible BER called the error floor in the high SNR region. So, evaluation of the error floor is required to estimate the performance lower limit of communication systems. This dissertation introduces a unified expression for BER of digital phase modulation with phase error for an arbitrary bit mapping. Then, we derive an exact and general closed-form expression for the BER of MPSK in the presence of a fixed phase error when Gray code bit mapping is employed. We also propose a very simple and tight approximate expression from the derived exact expression. To validate the exactness of the proposed exact and general expression and the tightness of the proposed approximation, we compare the results obtained from the proposed expressions with those from computer simulations. We also present the average BER results of MPSK for random phase errors caused by PLL or imperfect channel estimation by using the derived expressions. For high SNR, the effect of the random phase error on the BER performance becomes more dominant than that of additive white Gaussian noise, and results in the error floor. To investigate the effect of random phase error on BER performance of MPSK in a high SNR region, we derive a lower limit expression for the BER, i.e., bit error floor, of MPSK when random phase error exists. In the case of multi-level digital phase modulation, evaluation of bit error floor is more complex than single-level digital phase modulation. In addition to MPSK results, we also present a lower limit expression for the BER of APSK. Since the derived exact BER expression is general and the proposed approximate BER expression is very simple and tight, they can readily allow BER performance evaluation of digital phase modulation for various cases of practical interest in communication systems with phase error. Furthermore, the derived BER lower limit expressions are simple and accurate in the error floor region, so it can offer a convenient way to calculate the irreducible BER of digital phase modulation in the presence of random phase error.