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A Study of Surface-Tensile-Stress Induced Polishing-Voids in Cross-Point Phase-Change-Memory Cells

Title
A Study of Surface-Tensile-Stress Induced Polishing-Voids in Cross-Point Phase-Change-Memory Cells
Other Titles
크로스 포인트 상변화 메모리의 인장응력 기인성 연마 결함에 대한 연구
Author
김수범
Alternative Author(s)
김수범
Advisor(s)
박재근
Issue Date
2020-02
Publisher
한양대학교
Degree
Doctor
Abstract
In the fabrication of cross-point phase-change-memory-cells through atomic-layer-deposition of Ge-doped SbTe (Ge-ST) film followed by chemical-mechanical-polarization (CMP), a remarkable surface tensile stress was generated, originating from the surface stress induced by the pad down force and the surface structure tensile stress in a confined memory-cell structure. It was maximized at the position of the Si3N4-film spacer where the curvature becomes zero. The maximized surface tensile stress produced polishing induced voids via the generation mechanism of the stress corrosion cracking. The generation frequency and nanoscale size of the polishing induced voids rapidly increased at the maximum surface tensile stress during CMP. Then, they slightly decreased and saturated when the surface tensile stress reduced during further CMP. The proposed confined memory-cell structure prevented polishing induced voids from generating during the Ge-ST film CMP. A design of a spacer using a SiO2-film spacer rather a Si3N4-film spacer could prevent the generation of the polishing induced voids, confirming that the generation mechanism of the polishing induced voids is associated with the stress corrosion cracking. This result confirmed that the generation mechanism of the polishing induced voids during a Ge-ST CMP in the confined memory-cell structure was associated with the surface stress corrosion cracking. In addition, I proposed a novel solution by designing a CMP slurry using a proper oxidizer (i.e., H2O2). In particular, the mechanism why the addition of the oxidizer in the slurry suppressed the generation of the polishing voids was characterized by corrosion behavior, surface chemical reaction, and chemical composition profiles of the PCM (Ge-doped SbTe in my study) film after CMP. In particular, I present five major scientific and technical findings in my study: 1) the generation frequency of the polishing induced voids near the surface peaked at the position at which the maximum combined surface tensile stress occurred, 2) the generation mechanism of the surface polishing induced voids during the Ge-ST film CMP via stress corrosion cracking, and 3) the effect of the reduced surface structural stress on inhibiting void generation. 4) the oxidizer in the CMP slurry prevents the corrosion and etching of the Ge-ST film surface, 5) the oxidizer in the CMP slurry produces and passivates a dense chemical oxidation layer of several nm on the Ge-ST film surface to avoid the generation of the polishing voids
URI
https://repository.hanyang.ac.kr/handle/20.500.11754/123739http://hanyang.dcollection.net/common/orgView/200000436717
Appears in Collections:
GRADUATE SCHOOL[S](대학원) > ELECTRONICS AND COMPUTER ENGINEERING(전자컴퓨터통신공학과) > Theses (Ph.D.)
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