Variations in the Memory Capability of Nonvolatile Memory Devices Fabricated Using Hybrid Composites of InP Nanoparticles and a Polystyrene Layer Due to the Scale-Down
- Title
- Variations in the Memory Capability of Nonvolatile Memory Devices Fabricated Using Hybrid Composites of InP Nanoparticles and a Polystyrene Layer Due to the Scale-Down
- Author
- 김태환
- Keywords
- Nonvolatile Memory Devices; Polystyrene; InP Nanoparticles; Solution Method; Scale-Down
- Issue Date
- 2011-01
- Publisher
- AMER SCIENTIFIC PUBLISHERS, 26650 THE OLD RD, STE 208, VALENCIA, CA 91381-0751 USA
- Citation
- JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY; JAN 2011, 11 1, p449-p452, 4p.
- Abstract
- InP nanoparticles were formed using a solution method, and the InP nanoparticles that were embedded in a polystyrene (PS) layer were formed using the spin-coating method. The transmission electron microscopy images showed that the InP nanoparticles were randomly distributed in the PS layer. The measured capacitance voltage (C-V) of the Al/InP nanoparticles embedded in the PS layer/PS/p-Si(100) device at 300 K showed a clockwise hysteresis of the C-V curve. Based on the C-V results, the origin of variations in the memory storage of nonvolatile memory devices that were fabricated using InP nanoparticles embedded in a PS layer due to the scale-down was described.
- URI
- http://www.ingentaconnect.com/content/asp/jnn/2011/00000011/00000001/art00074https://repository.hanyang.ac.kr/handle/20.500.11754/72744
- ISSN
- 1533-4880
- DOI
- 10.1166/jnn.2011.3172
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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