Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 권오경 | - |
dc.date.accessioned | 2018-07-25T06:51:28Z | - |
dc.date.available | 2018-07-25T06:51:28Z | - |
dc.date.issued | 2011-07 | - |
dc.identifier.citation | IEEE Transactions on Circuits and Systems II: Express Briefs IEEE Trans. Circuits Syst. II Circuits and Systems II: Express Briefs, IEEE Transactions on. 58(7):422-426 Jul, 2011 | en_US |
dc.identifier.issn | 1558-3791 | - |
dc.identifier.issn | 1549-7747 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/5940211/ | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/72923 | - |
dc.description.abstract | An independently controlled eye-tracking clock- and data-recovery (CDR) circuit that achieves enhanced high-frequency jitter tolerance is presented in this brief. In the proposed CDR, a data-tracking loop compensates interchannel timing skews and rejects low-frequency jitter of the data, and an eye-tracking loop tracks asymmetric jitter distribution and high-frequency jitter of the data to enhance high-frequency jitter tolerance. This can be achieved by independently controlling two loops in the digital domain. The CDR is implemented using an 0.18-mu m CMOS process, and a bit error rate of less than 10(-12) was achieved for a data rate up to 5.8 Gb/s using a 2(31) - 1 pseudorandom binary-sequence input. | en_US |
dc.description.sponsorship | The authors would like to thank K.-S. Kwak, S.-J. Ahn, M.-S. Shin, E.-J. Kim, H.-R. Choi, and Y.-J. Kim for their useful discussion and feedback. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA | en_US |
dc.subject | Bang-bang phase detector (PD) | en_US |
dc.subject | clock and data recovery (CDR) | en_US |
dc.subject | complementary metal-oxide-semiconductor (CMOS) | en_US |
dc.subject | dynamic random access memory (DRAM) | en_US |
dc.subject | eye tracking | en_US |
dc.subject | jitter tolerance | en_US |
dc.title | Clock- and Data-Recovery Circuit With Independently Controlled Eye-Tracking Loop for High-Speed Graphic DRAMs | en_US |
dc.type | Article | en_US |
dc.relation.no | 7 | - |
dc.relation.volume | 58 | - |
dc.identifier.doi | 10.1109/TCSII.2011.2158254 | - |
dc.relation.page | 422-426 | - |
dc.relation.journal | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | - |
dc.contributor.googleauthor | Song, Jun-Yong | - |
dc.contributor.googleauthor | Kwon, Oh-Kyong | - |
dc.relation.code | 2011212701 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | okwon | - |
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