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dc.contributor.author정두석-
dc.date.accessioned2018-05-29T02:09:46Z-
dc.date.available2018-05-29T02:09:46Z-
dc.date.issued2016-05-
dc.identifier.citationFRONTIERS IN NEUROSCIENCE, v.10, page.1-16en_US
dc.identifier.issn1662-453X-
dc.identifier.urihttps://www.frontiersin.org/articles/10.3389/fnins.2016.00212/full-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/71593-
dc.description.abstractThe artificial spiking neural network (SNN) is promising and has been brought to the notice of the theoretical neuroscience and neuromorphic engineering research communities. In this light, we propose a new type of artificial spiking neuron based on leaky integrate-and-fire (LIF) behavior. A distinctive feature of the proposed FG-LIF neuron is the use of a floating-gate (FG) integrator rather than a capacitor-based one. The relaxation time of the charge on the FG relies mainly on the tunnel barrier profile, e.g., barrier height and thickness (rather than the area). This opens up the possibility of large-scale integration of neurons. The circuit simulation results offered biologically plausible spiking activity (<100 Hz) with a capacitor of merely 6 fF, which is hosted in an FG metal-oxide-semiconductor field-effect transistor. The FG-LIF neuron also has the advantage of low operation power (<30 pW/spike). Finally, the proposed circuit was subject to possible types of noise, e.g., thermal noise and burst noise. The simulation results indicated remarkable distributional features of interspike intervals that are fitted to Gamma distribution functions, similar to biological neurons in the neocortex.en_US
dc.description.sponsorshipThe authors acknowledge a Korea Institute of Science and Technology grant (grant number 2E26691).en_US
dc.language.isoenen_US
dc.publisherFRONTIERS MEDIA SAen_US
dc.subjectfloating-gate integratoren_US
dc.subjectleaky integrate-and-fire neuronen_US
dc.subjectspiking neural networken_US
dc.subjectsynaptic transistoren_US
dc.subjectspatial integrationen_US
dc.titleLeaky integrate-and-fire neuron circuit based on floating-gate integratoren_US
dc.typeArticleen_US
dc.identifier.doi10.3389/fnins.2016.00212-
dc.relation.journalFRONTIERS IN NEUROSCIENCE-
dc.contributor.googleauthorKornijcuk, Vladimir-
dc.contributor.googleauthorLim, Hyungkwang-
dc.contributor.googleauthorSeok, Jun Yeong-
dc.contributor.googleauthorKim, Guhyun-
dc.contributor.googleauthorKim, Seong Keun-
dc.contributor.googleauthorKim, Inho-
dc.contributor.googleauthorChoi, Byung Joon-
dc.contributor.googleauthorJeong, Doo Seok-
dc.relation.code2016012403-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDIVISION OF MATERIALS SCIENCE AND ENGINEERING-
dc.identifier.piddooseokj-


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