Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 백상현 | - |
dc.date.accessioned | 2018-04-19T02:13:39Z | - |
dc.date.available | 2018-04-19T02:13:39Z | - |
dc.date.issued | 2016-09 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON NUCLEAR SCIENCE, v. 63, No. 6, Page. 2934-2940 | en_US |
dc.identifier.issn | 0018-9499 | - |
dc.identifier.issn | 1558-1578 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/abstract/document/7565582/ | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/69321 | - |
dc.description.abstract | A guard-gate based flip-flop circuit temporally hardened against single-event effects is presented in this paper. Compared to several existed techniques, the organization of components inside the proposed design allows the improved performance- only one tau (the maximum width of a single-event transient (SET) to tolerate) is added into the setup time. A previously reported low-power delay element is applied, which helps make the proposed design power-efficient. The proposed design was implemented in a 65 nm CMOS bulk technology. Alpha and heavy-ions radiation experiments were performed to characterize its soft-error rates. Experimental results show that the proposed design presents no error with LETs up to 37.3 MeV-cm(2)/mg. Simulation results from the TFIT further validate the experimental results. | en_US |
dc.description.sponsorship | The authors appreciate the support from the Natural Sciences and Engineering Research Council of Canada (NSERC) and CMC Microsystems. | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | en_US |
dc.subject | Flip-flop | en_US |
dc.subject | SET | en_US |
dc.subject | SEU | en_US |
dc.subject | temporal hardening | en_US |
dc.subject | CMOS TECHNOLOGY | en_US |
dc.subject | HEAVY-ION | en_US |
dc.subject | GUARD-GATES | en_US |
dc.subject | DESIGN | en_US |
dc.subject | UPSET | en_US |
dc.subject | SENSITIVITY | en_US |
dc.subject | PERFORMANCE | en_US |
dc.subject | MECHANISMS | en_US |
dc.subject | SRAMS | en_US |
dc.subject | POWER | en_US |
dc.title | A 65 nm Temporally Hardened Flip-Flop Circuit | en_US |
dc.type | Article | en_US |
dc.relation.no | 6 | - |
dc.relation.volume | 63 | - |
dc.identifier.doi | 10.1109/TNS.2016.2608911 | - |
dc.relation.page | 2934-2940 | - |
dc.relation.journal | IEEE TRANSACTIONS ON NUCLEAR SCIENCE | - |
dc.contributor.googleauthor | Li, YQ | - |
dc.contributor.googleauthor | Wang, HB | - |
dc.contributor.googleauthor | Liu, R | - |
dc.contributor.googleauthor | Chen, L | - |
dc.contributor.googleauthor | Nofal, I | - |
dc.contributor.googleauthor | Chen, QY | - |
dc.contributor.googleauthor | He, AL | - |
dc.contributor.googleauthor | Guo, G | - |
dc.contributor.googleauthor | Baeg, S.H | - |
dc.contributor.googleauthor | Wen, SJ | - |
dc.contributor.googleauthor | Wong, R | - |
dc.contributor.googleauthor | Wu, Q | - |
dc.contributor.googleauthor | Chen, M | - |
dc.relation.code | 2016002576 | - |
dc.sector.campus | E | - |
dc.sector.daehak | COLLEGE OF ENGINEERING SCIENCES[E] | - |
dc.sector.department | DIVISION OF ELECTRICAL ENGINEERING | - |
dc.identifier.pid | bau | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.