Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 권오경 | - |
dc.date.accessioned | 2018-04-16T05:49:04Z | - |
dc.date.available | 2018-04-16T05:49:04Z | - |
dc.date.issued | 2012-06 | - |
dc.identifier.citation | IEEE Transactions on Electron Devices, 2012 59(6), P.1693-1700 | en_US |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/6178785/ | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11754/67990 | - |
dc.description.abstract | This paper presents a CMOS image sensor with 10-bit column-parallel successive approximation analog-to-digital converters (SA-ADCs). The SA-ADC in each column integrates the binary-weighted references instead of using an internal digital-to-analog converter (DAC) to reduce the area. The area of the column 10-bit SA-ADC is 9 mu\m x 425 mu m. The area of the capacitor array in the SA-ADC is reduced to only 2.8% compared with that of a conventional binary-weighted capacitor DAC. In order to reduce the power consumption, the SA-ADC uses the switched power technique. The constant analog-to-digital conversion time and the switched power technique increase the power saving rate as the frame rate decreases. The proposed image sensor has been fabricated using a 0.13-mu m CMOS process. The measured power consumption of the proposed SA-ADC is reduced to 85% and 58% of that in the SA-ADC without the switched power technique at the frame frequencies of 15 and 150 frames/s, respectively. | en_US |
dc.description.sponsorship | This work was supported in part by the Image Frontier Center and in part by Samsung Electronics Co., Ltd. for IC fabrication. The review of this paper was arranged by Editor J. R. Tower. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.subject | CMOS image sensor | en_US |
dc.subject | column-parallel readout architecture | en_US |
dc.subject | low-power consumption | en_US |
dc.subject | small-area successive approximation analog-to-digital converter (SA-ADC) | en_US |
dc.title | A 1.92-Megapixel CMOS Image Sensor With Column-Parallel Low-Power and Area-Efficient SA-ADCs | en_US |
dc.type | Article | en_US |
dc.relation.no | 6 | - |
dc.relation.volume | 59 | - |
dc.identifier.doi | 10.1109/TED.2012.2190936 | - |
dc.relation.page | 1693-1700 | - |
dc.relation.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.contributor.googleauthor | Shin, M.-S. | - |
dc.contributor.googleauthor | Kim, J.-B. | - |
dc.contributor.googleauthor | Kim, M.-K. | - |
dc.contributor.googleauthor | Jo, Y.-R. | - |
dc.contributor.googleauthor | Kwon, O.-K. | - |
dc.relation.code | 2012203864 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | okwon | - |
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