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dc.contributor.author송용호-
dc.date.accessioned2018-04-16T03:05:51Z-
dc.date.available2018-04-16T03:05:51Z-
dc.date.issued2012-10-
dc.identifier.citationJournal of Systems Architecture, October 2012, 58(9), p.339-353en_US
dc.identifier.issn1383-7621-
dc.identifier.urihttps://www.sciencedirect.com/science/article/pii/S1383762112000598-
dc.identifier.urihttp://hdl.handle.net/20.500.11754/67652-
dc.description.abstractRecent advances in semiconductor technologies make it possible to integrate many processor cores in a small device package. The parallel execution capability of such multi-core processors can be exploited to enhance the performance of many traditional sequential applications. There have been numerous research activities to develop parallelization techniques using the OpenMp programming model, in order to speed up sequential applications such as the H.264/AVC codec, but mostly in the PC environment. Therefore, it is difficult to understand which parallelization technique fits well with the H.264/AVC encoder on an embedded multi-core architecture. In this paper, we present parallelization techniques applicable to the H.264/AVC encoder on ARM MPCore using the OpenMP programming model. Further, we propose an analytical model for the performance estimation of the H.264/AVC encoder, and we then verify the model accuracy by performing simulations using hardware/software co-verification tool. Our experimental results show that the parallelization techniques proposed in this paper for the embedded multi-core platform improve the encoder performance by up to 2.36 times, and that the parallelization technique exploiting data-level parallelism outperforms the one using task-level parallelism by 41%. It is also observed that balancing loads among processor cores is a critical parameter in achieving better scalability in the encoder.en_US
dc.description.sponsorshipThis research was supported by the MKE (The Ministry of Knowledge Economy), Korea, under the ITRC (Information Technology Research Center) support program supervised by the NIPA (National IT Industry Promotion Agency) (NIPA-2012-C1090-1200-0010).en_US
dc.language.isoenen_US
dc.publisherElsevier Science B.V., Amsterdam.en_US
dc.subjectParallel programmingen_US
dc.subjectMultimedia codecen_US
dc.subjectMulti-core processoren_US
dc.subjectEmbedded systemen_US
dc.subjectDesign explorationen_US
dc.titleExploring parallelization techniques based on OpenMP in H.264/AVC encoder for embedded multi-core processoren_US
dc.title.alternativeAVC encoder for embedded multi-core processoren_US
dc.typeArticleen_US
dc.relation.no9-
dc.relation.volume58-
dc.identifier.doi10.1016/j.sysarc.2012.06.005-
dc.relation.page339-353-
dc.relation.journalJOURNAL OF SYSTEMS ARCHITECTURE-
dc.contributor.googleauthorJo, S.-
dc.contributor.googleauthorJo, S. H.-
dc.contributor.googleauthorSong, Y. H.-
dc.relation.code2012205873-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidyhsong-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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