Design for high throughput SHA-1 hash function on FPGA
- Title
- Design for high throughput SHA-1 hash function on FPGA
- Author
- 원유집
- Keywords
- Throughput; Field programmable gate arrays; Computer architecture; Pipeline processing; Hardware; Algorithm design and analysis; Software algorithms
- Issue Date
- 2012-07
- Publisher
- IEEE
- Citation
- Institute of Electrical and Electronics Engineers, 2012
- Abstract
- In this paper, we propose SHA-1 architectures to achieve high-throughput hardware implementations. Two techniques such as loop unfolding and pre-processing were used for high-speed SHA-1 core design. The system is made of four sub-modules to increase throughput. Xilinx Virtex-6 FPGA is used for implementation. Implemented SHA-1 module achieves a throughput of 7.35 Gbps, and its behavior has been verified by connecting with Xilinx MicroBlaze soft processor.
- URI
- https://ieeexplore.ieee.org/abstract/document/6261737/http://hdl.handle.net/20.500.11754/66376
- ISSN
- 2165-8528
- DOI
- 10.1109/ICUFN.2012.6261737
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > COMPUTER SCIENCE(컴퓨터소프트웨어학부) > Articles
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