Data dependency reduction for parallelism enhancement of HEVC decoder
- Title
- Data dependency reduction for parallelism enhancement of HEVC decoder
- Author
- 송용호
- Keywords
- HEVC; parallelism; intra prediction; electron divices; circuits; and systems
- Issue Date
- 2014-03
- Publisher
- The Institute of Electronics, Information and Communication Engineers (IEICE).
- Citation
- IEICE Electronics Express, v.11 no.7[2014년], pp. 20140027-20140027
- Abstract
- HEVC is a video codec which yields higher coding efficiency compared to its predecessors. This efficiency improvement has been realized by adopting many advanced algorithms to its coding tools which often require a huge amount of computation. Beside, HEVC is designed to be applicable mainly to high resolution videos that necessitate the enormous amount of computation. One common solution to this problem is to execute the algorithms in a parallelized way. However, the data dependency between neighboring coding tree units, the basic decoding unit in HEVC, limits the level of parallelization in Intra Prediction. This paper proposes a dependency reduction technique which identifies virtual dependencies among coding tree units via runtime analysis and eliminates them to enhance potential parallelism. The experimental results show that the performance of Intra Prediction can be significantly improved by lifting such virtual dependencies
- URI
- https://www.jstage.jst.go.jp/article/elex/11/7/11_11.20140027/_article/-char/enhttp://hdl.handle.net/20.500.11754/50489
- ISSN
- 1349-2543
- DOI
- 10.1587/elex.11.20140027
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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