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An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems

Title
An ILP-based Worst-case Performance Analysis Technique for Distributed Real-time Embedded Systems
Author
오현옥
Keywords
Processor scheduling; Time factors; Program processors; Real-time systems; Time complexity; Embedded systems; Estimation
Issue Date
2012-12
Publisher
IEEE
Citation
Real-Time Systems Symposium, Dec 2012, P.363-372
Abstract
Finding a tight upper bound of the worst-case response time in a distributed real-time embedded system is a very challenging problem since we have to consider execution time variations of tasks, jitter of input arrivals, scheduling anomaly behavior in a multi-tasking system, all together. In this paper, we translate the problem as an optimization problem and propose a novel solution based on ILP (Integer Linear Programming). In the proposed technique, we formulate a set of ILP formulas in a compositional way for modeling flexibility, but solve the problem holistically to achieve tighter upper bounds. To mitigate the time complexity of the ILP method, we perform static analysis based on a scheduling heuristic to reduce the number of variables and confine the variable ranges. Preliminary experiments with the benchmarks used in the related work and a real-life example show promising results that give tight bounds in an affordable solution time.
URI
http://ieeexplore.ieee.org/abstract/document/6424818/http://hdl.handle.net/20.500.11754/50269
ISSN
1052-8725
DOI
10.1109/RTSS.2012.86
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > INFORMATION SYSTEMS(정보시스템학과) > Articles
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