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dc.contributor.author최병덕-
dc.date.accessioned2018-03-20T06:02:39Z-
dc.date.available2018-03-20T06:02:39Z-
dc.date.issued2013-03-
dc.identifier.citationJAPANESE JOURNAL OF APPLIED PHYSICS, 2013, 52(3), UNSP 03BC01en_US
dc.identifier.issn0021-4922-
dc.identifier.issn1347-4065-
dc.identifier.urihttp://iopscience.iop.org/article/10.7567/JJAP.52.03BC01/meta-
dc.identifier.urihttp://hdl.handle.net/20.500.11754/49594-
dc.description.abstractIn this paper, we propose an integrated hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) gate driver circuit with parallely connected TFTs to resolve problems of the large circuit area and large number of input signals which are founded in the previously reported decoder-type and demultiplexer-type integrated gate drivers. The proposed gate driver can alleviate the demerits of previous gate drivers while maintaining their advantages: reduction of the threshold voltage (V-th) shift of the a-Si: H TFTs with an AC-driving structure and provide a stable low-impedance output. The key idea is to construct a novel decoder based on parallely connected TFTs instead of serially connected ones that are very common for decoders. The simulation results show that the rising time and falling time are 1.27 and 1.63 mu s respectively with -5 to 30 V output voltage swing which are suitable for high resolution active-matrix displays. (c) 2013 The Japan Society of Applied Physicsen_US
dc.description.sponsorshipThis work was supported by the IT R&D program of MKE/KEIT (K1002182, TFT backplane technology for next generation display). This work was also supported by Brain Korea 21 Project and partially supported by IDEC.en_US
dc.language.isoenen_US
dc.publisherIOP PUBLISHING LTD, TEMPLE CIRCUS, TEMPLE WAY, BRISTOL BS1 6BE, ENGLANDen_US
dc.subjectINSTABILITY MECHANISMSen_US
dc.subjectBIAS-STRESSen_US
dc.subjectDEPENDENCEen_US
dc.subjectTIMEen_US
dc.subjectTFTSen_US
dc.titleCompact Decoder-Type Gate Driver Circuits with Hydrogenated Amorphous Silicon Thin Film Transistors for Active Matrix Displaysen_US
dc.typeArticleen_US
dc.relation.volume52-
dc.identifier.doi10.7567/JJAP.52.03BC01-
dc.relation.page1-5-
dc.relation.journalJAPANESE JOURNAL OF APPLIED PHYSICS-
dc.contributor.googleauthorKim, JS-
dc.contributor.googleauthorPark, GT-
dc.contributor.googleauthorKim, HW-
dc.contributor.googleauthorChoi, BD-
dc.relation.code2013010434-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidbdchoi-
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COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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