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Design of an application specific instruction set processor for a universal bitstream codec

Title
Design of an application specific instruction set processor for a universal bitstream codec
Author
송용호
Keywords
ASIP; entropy coding; RLC; bitstream; H.264
Issue Date
2014-06
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG, KIKAI-SHINKO-KAIKAN BLDG, 3-5-8, SHIBA-KOEN, MINATO-KU, TOKYO, 105-0011, JAPAN
Citation
IEICE ELECTRONICS EXPRESS, 권: 11, 호: 24
Abstract
Recent increases in the type and amount of multimedia data has required a versatile device enough to play various data. Especially a variety of lossless compression algorithms often causes large amount of redundant computations. In this paper, an application-specific instruction processor tailored to effectively process such coding algorithms is proposed. The functionality and performance of the processor has been verified by using it to run the H.264/AVC baseline profile encoder. The experimental results show that the proposed processor can save about 96% and 36% of the execution cycles of ARM Cortex-A9 and Intel i7 processors, respectively.
URI
https://www.jstage.jst.go.jp/article/elex/11/24/11_11.20141047/_article/-char/ja/http://hdl.handle.net/20.500.11754/47714
ISSN
1349-2543
DOI
10.1587/elex.11.20141047
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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