Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 권오경 | - |
dc.date.accessioned | 2018-03-12T06:53:43Z | - |
dc.date.available | 2018-03-12T06:53:43Z | - |
dc.date.issued | 2013-05 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, MAY 2013, 26(2), P.226-p232 | en_US |
dc.identifier.issn | 0894-6507 | - |
dc.identifier.uri | http://apps.webofknowledge.com/InboundService.do?customersID=LinksAMR&mode=FullRecord&IsProductCode=Yes&product=WOS&Init=Yes&Func=Frame&DestFail=http%3A%2F%2Fwww.webofknowledge.com&action=retrieve&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&SID=D3avNMo4kHPc6xOFiRW&UT=WOS%3A000318696700007 | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11754/45472 | - |
dc.description.abstract | This paper presents a precision mismatch measurement method to characterize an integrated capacitor array. Conventional mismatch measurement methods using floating gate capacitance measurement (FGCM) have measurement error due to the large input-referred noise and the small input signal range of the source follower. In order to improve the measurement accuracy, we propose a new measurement method using a parasitic-insensitive switched capacitor amplifier and the correlated double sampling (CDS) technique. The CDS technique eliminates the measurement error from parasitic capacitances, switching errors, and the offset voltage of the amplifier. In order to verify the proposed method, a test chip was fabricated using a 0.18-mu m CMOS process. The chip consists of a 4 x 16 metal-insulator-metal capacitor array and a measurement circuit. The measured standard deviation of the capacitance mismatch, sigma(Delta C-n/< C >), ranges from 0.0067% to 0.0130%, and the measured standard deviation of the short-term repeatability, sigma(Delta(Delta C-n/< C >)), is 0.0025%. These results show that the measurement accuracy of the proposed method is improved by ten times over that of the FGCM method. | en_US |
dc.description.sponsorship | This work was supported in part by the Industrial Convergence Fundamental Technology Development Business Program of the Korean Ministry of the Knowledge under Grant 10037347. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE | en_US |
dc.subject | Capacitor array mismatch measurement | en_US |
dc.subject | correlated double sampling (CDS) | en_US |
dc.subject | short-term repeatability | en_US |
dc.subject | standard deviation of capacitance mismatch | en_US |
dc.subject | switched capacitor amplifier | en_US |
dc.title | A Precision Mismatch Measurement Technique for Integrated Capacitor Array Using a Switched Capacitor Amplifier | en_US |
dc.type | Article | en_US |
dc.relation.no | 2 | - |
dc.relation.volume | 26 | - |
dc.identifier.doi | 10.1109/TSM.2013.2254731 | - |
dc.relation.page | 226-232 | - |
dc.relation.journal | IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING | - |
dc.contributor.googleauthor | Kwon, Young-Cheon | - |
dc.contributor.googleauthor | Kwon, Oh-Kyong | - |
dc.relation.code | 2013010203 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | okwon | - |
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