Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 송용호 | - |
dc.date.accessioned | 2018-03-01T01:42:11Z | - |
dc.date.available | 2018-03-01T01:42:11Z | - |
dc.date.issued | 2012-08 | - |
dc.identifier.citation | IEEE transactions on consumer electronics,Vol.58,No.3 [2012],p825-833 | en_US |
dc.identifier.issn | 0098-3063 | - |
dc.identifier.uri | http://ieeexplore.ieee.org/document/6311324/ | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11754/41387 | - |
dc.description.abstract | NAND flash memory is widely used in many embedded systems owing to such advantages as a small size, shock resistance, and low power consumption. However, NAND flash memory has certain hardware limitations such as an "erase-before-write" constraint, which creates a long write latency. Therefore, many studies have been performed to reduce the write latency of NAND flash, one of which uses phase-changed RAM (PRAM) as a supplemental device to overcome the disadvantages of NAND flash memory. However, it is difficult to apply PRAM to storage systems owing to its limited density and high cost per capacity. To solve this problem, a novel management scheme for PRAM/NAND flash hybrid storage is proposed. Our proposed method uses limited PRAM space more efficiently by reducing the size of the data to be stored through an efficient compression scheme using differential values and rates. In addition, the proposed method improves the performance and durability of storage systems by efficiently reducing the flash program operation. Our experiments show that the proposed scheme can improve the performance and durability of PRAM/NAND flash hybrid storage with only slight increases in hardware costs.(1) | en_US |
dc.description.sponsorship | This research was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MEST) (No. 2011-0017147). | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE; 1999 | en_US |
dc.subject | NAND flash memory | en_US |
dc.subject | PRAM | en_US |
dc.subject | hybrid storage system | en_US |
dc.subject | differential data | en_US |
dc.subject | compression | en_US |
dc.subject | BUFFER MANAGEMENT POLICY | en_US |
dc.subject | FLASH TRANSLATION LAYER | en_US |
dc.subject | MEMORY | en_US |
dc.subject | IDENTIFICATION | en_US |
dc.title | An Efficient use of PRAM for an Enhancement in the Performance and Durability of NAND Storage Systems | en_US |
dc.type | Article | en_US |
dc.relation.no | 3 | - |
dc.relation.volume | 58 | - |
dc.identifier.doi | 10.1109/TCE.2012.6311324 | - |
dc.relation.page | 825-833 | - |
dc.relation.journal | IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | - |
dc.contributor.googleauthor | Lee, Sangyong | - |
dc.contributor.googleauthor | Jung, Sanghyuk | - |
dc.contributor.googleauthor | Song, Yong-Ho | - |
dc.relation.code | 2012203859 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | yhsong | - |
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