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dc.contributor.author송용호-
dc.date.accessioned2018-03-01T01:42:11Z-
dc.date.available2018-03-01T01:42:11Z-
dc.date.issued2012-08-
dc.identifier.citationIEEE transactions on consumer electronics,Vol.58,No.3 [2012],p825-833en_US
dc.identifier.issn0098-3063-
dc.identifier.urihttp://ieeexplore.ieee.org/document/6311324/-
dc.identifier.urihttp://hdl.handle.net/20.500.11754/41387-
dc.description.abstractNAND flash memory is widely used in many embedded systems owing to such advantages as a small size, shock resistance, and low power consumption. However, NAND flash memory has certain hardware limitations such as an "erase-before-write" constraint, which creates a long write latency. Therefore, many studies have been performed to reduce the write latency of NAND flash, one of which uses phase-changed RAM (PRAM) as a supplemental device to overcome the disadvantages of NAND flash memory. However, it is difficult to apply PRAM to storage systems owing to its limited density and high cost per capacity. To solve this problem, a novel management scheme for PRAM/NAND flash hybrid storage is proposed. Our proposed method uses limited PRAM space more efficiently by reducing the size of the data to be stored through an efficient compression scheme using differential values and rates. In addition, the proposed method improves the performance and durability of storage systems by efficiently reducing the flash program operation. Our experiments show that the proposed scheme can improve the performance and durability of PRAM/NAND flash hybrid storage with only slight increases in hardware costs.(1)en_US
dc.description.sponsorshipThis research was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MEST) (No. 2011-0017147).en_US
dc.language.isoenen_US
dc.publisherIEEE; 1999en_US
dc.subjectNAND flash memoryen_US
dc.subjectPRAMen_US
dc.subjecthybrid storage systemen_US
dc.subjectdifferential dataen_US
dc.subjectcompressionen_US
dc.subjectBUFFER MANAGEMENT POLICYen_US
dc.subjectFLASH TRANSLATION LAYERen_US
dc.subjectMEMORYen_US
dc.subjectIDENTIFICATIONen_US
dc.titleAn Efficient use of PRAM for an Enhancement in the Performance and Durability of NAND Storage Systemsen_US
dc.typeArticleen_US
dc.relation.no3-
dc.relation.volume58-
dc.identifier.doi10.1109/TCE.2012.6311324-
dc.relation.page825-833-
dc.relation.journalIEEE TRANSACTIONS ON CONSUMER ELECTRONICS-
dc.contributor.googleauthorLee, Sangyong-
dc.contributor.googleauthorJung, Sanghyuk-
dc.contributor.googleauthorSong, Yong-Ho-
dc.relation.code2012203859-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidyhsong-
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COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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