Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 최창환 | - |
dc.date.accessioned | 2018-02-22T08:54:13Z | - |
dc.date.available | 2018-02-22T08:54:13Z | - |
dc.date.issued | 2012-09 | - |
dc.identifier.citation | Japanese Journal of Applied Physics, Oct 2012, 51(10), P.101203-1012034 | en_US |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.issn | 1347-4065 | - |
dc.identifier.uri | http://iopscience.iop.org/article/10.1143/JJAP.51.101203/meta | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11754/40071 | - |
dc.description.abstract | Wet chemicals for etching sputtered TiN metal gate and post etch annealing on HfO2 and HfSiON gate dielectrics were studied with metal-oxide-semiconductor devices. Various wet solutions such as SC1 (NH4/H2O2/H2O = 1 : 2 : 5), SPM (H2SO4/H2O2 = 10 : 1), and H2O2 were employed to etch the sputtered TiN. Difference in equivalent oxide thickness (EOT) is negligible among etchants while the lowest leakage current density (J(g)) is attained with only SPM solution. Even though SPM treatment shows relative poor surface morphologies compared to H2O2 process, difference in J(g) is mainly affected by the amount of absorbed Ti into high-k gate dielectrics during wet etch process. Lower J(g) using SPM is attributable to the reduced amount of Ti-adsorption due to additional H2SO4 acid in wet chemical solution, which is confirmed by total reflection X-ray fluorescence. Post etch annealing on high-k layer improves film qualities such as suppressed defects-less frequency dependence-and lowers J(g) further while EOT is slightly increased by about 0.2nm due to SiO2 interfacial regrowth. HfSiON gate dielectric shows stronger immunity against TiN wet etch compared with HfO2. Thus, appropriate etchant and post annealing for the selective TiN etching are carefully considered to suppress defects and J(g) for attaining complementary metal-oxide-semiconductor (CMOS) device. | en_US |
dc.description.sponsorship | This research was supported by the IT R&D program of MKE/KEIT (10039174, Technology Development of 22 nm level Foundry Device and PDK). | en_US |
dc.language.iso | en | en_US |
dc.publisher | IOP Publishing LTD | en_US |
dc.subject | WORK FUNCTION | en_US |
dc.subject | TECHNOLOGY | en_US |
dc.title | A Study of Sputtered TiN Gate Electrode Etching with Various Wet Chemicals and Post Etch Annealing for Complementary Metal-Oxide-Semiconductor Device Integration Applications | en_US |
dc.type | Article | en_US |
dc.relation.no | 10 | - |
dc.relation.volume | 51 | - |
dc.identifier.doi | 10.1143/JJAP.51.101203 | - |
dc.relation.page | 1012031-1012033 | - |
dc.relation.journal | JAPANESE JOURNAL OF APPLIED PHYSICS | - |
dc.contributor.googleauthor | Heo, Seung Chan | - |
dc.contributor.googleauthor | Yoo, Dongjun | - |
dc.contributor.googleauthor | Choi, Moon Suk | - |
dc.contributor.googleauthor | Kim, Dohyung | - |
dc.contributor.googleauthor | Choi, Changhwan | - |
dc.contributor.googleauthor | Chung, Chulwon | - |
dc.contributor.googleauthor | 허성찬 | - |
dc.contributor.googleauthor | 유동준 | - |
dc.contributor.googleauthor | 최문석 | - |
dc.contributor.googleauthor | 김도형 | - |
dc.contributor.googleauthor | 최창환 | - |
dc.contributor.googleauthor | 정철원 | - |
dc.relation.code | 2012217131 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DIVISION OF MATERIALS SCIENCE AND ENGINEERING | - |
dc.identifier.pid | cchoi | - |
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