Bulk and interface trap generation under negative bias temperature instability stress of p-channel metal-oxide-semiconductor field-effect transistors with nitrogen and silicon incorporated HfO(2) gate dielectrics
- Title
- Bulk and interface trap generation under negative bias temperature instability stress of p-channel metal-oxide-semiconductor field-effect transistors with nitrogen and silicon incorporated HfO(2) gate dielectrics
- Author
- 최창환
- Issue Date
- 2011-02
- Publisher
- American Institute of Physics
- Citation
- APPLIED PHYSICS LETTERS 2011, 98권, 6호,
- Abstract
- Negative bias temperature instabilities (NBTIs) of p-channel metal-oxide-semiconductor field-effect-transistor with HfO 2 HfO2, HfO x N y HfOxNy, and HfSiON were investigated. Higher bulk trap generation (ΔN ot ) (ΔNot) is mainly attributed to threshold voltage shift rather than interface trap generation (ΔN it ) (ΔNit). ΔN it ΔNit, ΔN ot ΔNot, activation energy (E a ) (Ea), and lifetime were exacerbated with incorporated nitrogen while improved with adding Si into gate dielectrics. Compared to HfO 2 HfO2, HfO x N y HfOxNy showed worse NBTI due to nitrogen pile-up at Si interface. However, adding Si into HfO x N y HfOxNy placed nitrogen peak profile away from Si/oxide interface and NBTI was reduced. This improvement is ascribed to reduced ΔN ot ΔNot and ΔN it ΔNit, resulting from less nitrogen at Si interface.
- URI
- http://aip.scitation.org/doi/10.1063/1.3541879
- ISSN
- 0003-6951
- DOI
- 10.1063/1.3541879
- Appears in Collections:
- COLLEGE OF ENGINEERING[S](공과대학) > MATERIALS SCIENCE AND ENGINEERING(신소재공학부) > Articles
- Files in This Item:
There are no files associated with this item.
- Export
- RIS (EndNote)
- XLS (Excel)
- XML