Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 유창식 | - |
dc.date.accessioned | 2017-06-09T02:40:23Z | - |
dc.date.available | 2017-06-09T02:40:23Z | - |
dc.date.issued | 2015-09 | - |
dc.identifier.citation | INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, v. 43, NO 9, Page. 1175-1182 | en_US |
dc.identifier.issn | 0098-9886 | - |
dc.identifier.issn | 1097-007X | - |
dc.identifier.uri | http://onlinelibrary.wiley.com/doi/10.1002/cta.2003/full | - |
dc.identifier.uri | http://hdl.handle.net/20.500.11754/27714 | - |
dc.description.abstract | For multi-Gb/s/pin parallel dynamic random access memory (DRAM) interface, a crosstalk cancelling voltage-mode driver is proposed. The voltage-mode driver is composed of a main driver and sub-drivers where the cancellation signal is generated by the sub-drivers. The outputs of the main driver and sub-drivers are combined by a capacitive coupling so the direct current (DC) output swing is not affected by the crosstalk cancellation and the sub-drivers may not consume DC power. The proposed crosstalk cancelling voltage-mode driver implemented in a 0.11-mu m complementary metal-oxide semiconductor (CMOS) technology improves the horizontal eye openings by 22.6ps at 4-Gbps/pin. Copyright (c) 2014 John Wiley Sons, Ltd. | en_US |
dc.description.sponsorship | This work was supported by SK-Hynix Semiconductor Inc., the National Research Foundation of Korea (NRF) grant funded by the Korea Government (MSIP) (No. 2013R1A2A2A01004958), and the MSIP (Ministry of Science, ICT & Future Planning), Korea, under the ITRC (Information Technology Research Center) support program (NIPA-2013-H0301-13-1013) supervised by the NIPA (National IT Industry Promotion Agency). The CAD tools were provided by IDEC. | en_US |
dc.language.iso | en | en_US |
dc.publisher | WILEY-BLACKWELL | en_US |
dc.subject | crosstalk | en_US |
dc.subject | crosstalk induced jitter | en_US |
dc.subject | single-ended signalling | en_US |
dc.subject | voltage-mode driver | en_US |
dc.subject | DRAM | en_US |
dc.subject | CMOS | en_US |
dc.title | Crosstalk cancelling voltage-mode driver for multi-Gbps parallel DRAM interface | en_US |
dc.type | Article | en_US |
dc.relation.no | 9 | - |
dc.relation.volume | 43 | - |
dc.identifier.doi | 10.1002/cta.2003 | - |
dc.relation.page | 1175-1182 | - |
dc.relation.journal | INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS | - |
dc.contributor.googleauthor | Kim, Younghoon | - |
dc.contributor.googleauthor | Yoo, Changsik | - |
dc.relation.code | 2015002372 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | csyoo | - |
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