421 0

Full metadata record

DC FieldValueLanguage
dc.contributor.author유창식-
dc.date.accessioned2017-06-09T02:40:23Z-
dc.date.available2017-06-09T02:40:23Z-
dc.date.issued2015-09-
dc.identifier.citationINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, v. 43, NO 9, Page. 1175-1182en_US
dc.identifier.issn0098-9886-
dc.identifier.issn1097-007X-
dc.identifier.urihttp://onlinelibrary.wiley.com/doi/10.1002/cta.2003/full-
dc.identifier.urihttp://hdl.handle.net/20.500.11754/27714-
dc.description.abstractFor multi-Gb/s/pin parallel dynamic random access memory (DRAM) interface, a crosstalk cancelling voltage-mode driver is proposed. The voltage-mode driver is composed of a main driver and sub-drivers where the cancellation signal is generated by the sub-drivers. The outputs of the main driver and sub-drivers are combined by a capacitive coupling so the direct current (DC) output swing is not affected by the crosstalk cancellation and the sub-drivers may not consume DC power. The proposed crosstalk cancelling voltage-mode driver implemented in a 0.11-mu m complementary metal-oxide semiconductor (CMOS) technology improves the horizontal eye openings by 22.6ps at 4-Gbps/pin. Copyright (c) 2014 John Wiley Sons, Ltd.en_US
dc.description.sponsorshipThis work was supported by SK-Hynix Semiconductor Inc., the National Research Foundation of Korea (NRF) grant funded by the Korea Government (MSIP) (No. 2013R1A2A2A01004958), and the MSIP (Ministry of Science, ICT & Future Planning), Korea, under the ITRC (Information Technology Research Center) support program (NIPA-2013-H0301-13-1013) supervised by the NIPA (National IT Industry Promotion Agency). The CAD tools were provided by IDEC.en_US
dc.language.isoenen_US
dc.publisherWILEY-BLACKWELLen_US
dc.subjectcrosstalken_US
dc.subjectcrosstalk induced jitteren_US
dc.subjectsingle-ended signallingen_US
dc.subjectvoltage-mode driveren_US
dc.subjectDRAMen_US
dc.subjectCMOSen_US
dc.titleCrosstalk cancelling voltage-mode driver for multi-Gbps parallel DRAM interfaceen_US
dc.typeArticleen_US
dc.relation.no9-
dc.relation.volume43-
dc.identifier.doi10.1002/cta.2003-
dc.relation.page1175-1182-
dc.relation.journalINTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS-
dc.contributor.googleauthorKim, Younghoon-
dc.contributor.googleauthorYoo, Changsik-
dc.relation.code2015002372-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentDEPARTMENT OF ELECTRONIC ENGINEERING-
dc.identifier.pidcsyoo-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
Files in This Item:
There are no files associated with this item.
Export
RIS (EndNote)
XLS (Excel)
XML


qrcode

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

BROWSE