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dc.contributor.author심종인-
dc.date.accessioned2023-07-21T02:38:04Z-
dc.date.available2023-07-21T02:38:04Z-
dc.date.issued2001-06-
dc.identifier.citationIEEE Transactions on Very Large Scale Integration (VLSI) Systems, v. 9, NO. 3, Page. 450-460-
dc.identifier.issn1063-8210;1557-9999-
dc.identifier.urihttps://ieeexplore.ieee.org/document/929579en_US
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/184084-
dc.description.abstractA new fast and accurate capacitance determination methodology for intricate multilayer VLSI interconnects is presented, Since a multilayer interconnect structure is too complicated to be directly tractable, it is simplified by investigating charge distributions within the system, The quasi-three-dimensional (3-D) capacitances of the structure are then determined by combining a set of solid-ground-based two-dimensional (2-D) capacitances and shielding effects that can be independently calculated from the simplified structure, The shielding effects due to the neighboring lines of a line can be analytically determined from the given layout dimensions, The solid-ground-based 2-D capacitances can also be quickly computed from the simplified structure. Thus, the proposed capacitance determination methodology is much more cost-efficient than conventional 3-D-based methods. It is shown that the calculated quasi-3-D capacitances have excellent agreement with 3-D held-solver-based results within 5% error.-
dc.description.sponsorshipManuscript received September 14, 1999; revised July 28, 2000. This work was supported by the Center for Electronic Packaging Materials, Korea Science and Engineering Foundation.-
dc.languageen-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.subjectcrosstalk-
dc.subjectinterconnect capacitance-
dc.subjectmultilayer-
dc.subjectshielding effect-
dc.subjectsignal delay-
dc.subjectVLSI interconnects-
dc.titleFast and accurate quasi-three-dimensional capacitance determination of multilayer VLSI interconnects-
dc.typeArticle-
dc.relation.no3-
dc.relation.volume9-
dc.identifier.doi10.1109/92.929579-
dc.relation.page450-460-
dc.relation.journalIEEE Transactions on Very Large Scale Integration (VLSI) Systems-
dc.contributor.googleauthorJin, Woojin-
dc.contributor.googleauthorEo, Yungseon-
dc.contributor.googleauthorEisenstadt, WR-
dc.contributor.googleauthorShim, Jong In-
dc.sector.campusE-
dc.sector.daehak과학기술융합대학-
dc.sector.department나노광전자학과-
dc.identifier.pidjishim-


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