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dc.contributor.author노정진-
dc.date.accessioned2023-07-13T01:52:42Z-
dc.date.available2023-07-13T01:52:42Z-
dc.date.issued2011-11-
dc.identifier.citation2011년도 대한전자공학회 추계학술대회 논문집, Page. 180-181-
dc.identifier.urihttps://www.dbpia.co.kr/journal/articleDetail?nodeId=NODE02338893en_US
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/183448-
dc.description.abstractThe buck converter that operates at a wide range of supply voltage levels and that can generate various output voltage levels compared to conventional circuits is designed. The designed buck converter uses in a standard 3.3V, 0.18um CMOS process.-
dc.languageko-
dc.publisher대한전자공학회-
dc.title출력 전압 노이즈를 최소화하기 위한 벅 변환기 설계-
dc.title.alternativeBuck Converter Design for Minimizing Output Noise-
dc.typeArticle-
dc.relation.page180-181-
dc.relation.journal2011년도 대한전자공학회 추계학술대회 논문집-
dc.contributor.googleauthor남현석-
dc.contributor.googleauthor안영국-
dc.contributor.googleauthor이희영-
dc.contributor.googleauthor노정진-
dc.sector.campusE-
dc.sector.daehak공학대학-
dc.sector.department전자공학부-
dc.identifier.pidjroh-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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