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dc.contributor.author송용호-
dc.date.accessioned2022-07-29T01:09:55Z-
dc.date.available2022-07-29T01:09:55Z-
dc.date.issued2020-10-
dc.identifier.citationIEEE ACCESS, v. 8, page. 185360-185372en_US
dc.identifier.issn2169-3536-
dc.identifier.urihttps://ieeexplore.ieee.org/document/9220140-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/171922-
dc.description.abstractMany flash storage systems divide input/output (I/O) requests that require large amounts of data into sub-requests to exploit their internal parallelism. In this case, an I/O request can be completed only after all sub-requests have been completed. Thus, non-critical sub-requests that are completed quickly do not affect I/O latency. To efficiently reduce I/O latency, we propose a buffer management scheme that allocates buffer space by considering the relationship between the processing time of the sub-request and I/O latency. The proposed scheme prevents non-critical sub-requests from wasting ready-to-use buffer space by avoiding the situation in which buffer spaces that are and are not ready to use are allocated to an I/O request. To allocate the same type of buffer space to an I/O request, the proposed scheme first groups sub-requests derived from the same I/O request and then applies a policy for allocating buffer space in units of sub-request groups. When the ready-to-use buffer space is insufficient to be allocated to the sub-request group being processed at a given time, the proposed scheme does not allocate it to the sub-request group but it instead sets it aside for future I/O requests. The results of the experiments to test the proposed scheme show that it can reduce I/O latency by up to 24% compared with prevalent buffer management schemes.en_US
dc.description.sponsorshipThis work was supported by the Ministry of Trade, Industry and Energy/Korea Institute for Industrial Economics and Trade (MOTIE/KEIT) through the Research and Development Program (Developing Processor-Memory-Storage Integrated Architecture for Low-Power, High-Performance Big Data Servers) under Grant 10077609.en_US
dc.language.isoenen_US
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INCen_US
dc.subjectBuffer managementen_US
dc.subjectflash memoryen_US
dc.subjectflash translation layeren_US
dc.subjectflash storage systemen_US
dc.titleGALRU: A Group-aware Buffer Management Scheme for Flash Storage Systemsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/ACCESS.2020.3030089-
dc.relation.page15-35-
dc.relation.journalIEEE ACCESS-
dc.contributor.googleauthorKwak, Jaewook-
dc.contributor.googleauthorLee, Jungkeol-
dc.contributor.googleauthorLee, Daeyong-
dc.contributor.googleauthorJeong, Joonyong-
dc.contributor.googleauthorLee, Gyeongyong-
dc.contributor.googleauthorChoi, Jungwook-
dc.contributor.googleauthorSong, Yong Ho-
dc.relation.code2020045465-
dc.sector.campusS-
dc.sector.daehakCOLLEGE OF ENGINEERING[S]-
dc.sector.departmentSCHOOL OF ELECTRONIC ENGINEERING-
dc.identifier.pidyhsong-
Appears in Collections:
COLLEGE OF ENGINEERING[S](공과대학) > ELECTRONIC ENGINEERING(융합전자공학부) > Articles
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