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dc.contributor.author백상현-
dc.date.accessioned2022-05-03T23:53:25Z-
dc.date.available2022-05-03T23:53:25Z-
dc.date.issued2021-09-
dc.identifier.citationIEEE ACCESS, v. 9, Page. 124632-124639en_US
dc.identifier.issn2169-3536-
dc.identifier.urihttps://ieeexplore.ieee.org/document/9530424-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/170524-
dc.description.abstractA memory fault model (FM) is an abstraction of the physical mechanism of memory failure. When the physical failure mechanisms are not fully represented in FMs, the coverage of the FMs can be different from that of the failure mechanisms. However, it is impractical (or impossible) to model every electrical aspect of the failure mechanisms with one or more FMs. This problem has become even worse with emerging technologies. Thus, in this study, the fault coverage (FC) consequences are investigated when the physical memory characteristics are not properly linked to the FMs or even test algorithms. Three physical characteristics were considered for this exploration: electrical masking, address scrambling, and electrical neighborhoods. To this end, memory fault simulations were performed, and the test algorithms were re-evaluated in terms of FC. Simulations were performed on the 1 kB area of the example SRAM model; three classes of FMs (56 static faults (SFs), 126 dynamic faults (DFs), and 192 neighborhood pattern-sensitive faults (NPSFs)) were simulated for FC evaluation; and March MSS, March MD2, and March 12N were used to re-evaluate the FCs of SFs, DFs, and NPSFs, respectively. From the simulation results, we observed the negative impact of physical characteristics on FC. When masking was considered, FC reductions of 10.72% SFs and 9.52% DFs were observed; when address scrambling was not available, an FC reduction of 80.21% NPSFs was observed. Finally, considering electrical neighborhood changes depending on the physical memory structure, an FC reduction of 41.67% NPSFs was observed.en_US
dc.language.isoenen_US
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INCen_US
dc.subjectFault coverage (FC) re-evaluationen_US
dc.subjectelectrical maskingen_US
dc.subjectaddress scramblingen_US
dc.subjectelectrical neighborhooden_US
dc.subjectmemory fault model (FM)en_US
dc.subjectElectrical engineering. Electronics. Nuclear engineeringen_US
dc.subjectTK1-9971en_US
dc.titleFault Coverage Re-Evaluation of Memory Test Algorithms With Physical Memory Characteristicsen_US
dc.typeArticleen_US
dc.relation.volume9-
dc.identifier.doi10.1109/ACCESS.2021.3110594-
dc.relation.page124632-124639-
dc.relation.journalIEEE ACCESS-
dc.contributor.googleauthorLee, Kiseok-
dc.contributor.googleauthorKim, Jeonghwan-
dc.contributor.googleauthorBaeg, Sanghyeon-
dc.relation.code2021000011-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentSCHOOL OF ELECTRICAL ENGINEERING-
dc.identifier.pidbau-
Appears in Collections:
COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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