Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 신동준 | - |
dc.date.accessioned | 2021-09-08T00:30:05Z | - |
dc.date.available | 2021-09-08T00:30:05Z | - |
dc.date.issued | 2020-03 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON COMMUNICATIONS, v. 68, no. 3, page. 1344-1357 | en_US |
dc.identifier.issn | 0090-6778 | - |
dc.identifier.issn | 1558-0857 | - |
dc.identifier.uri | https://ieeexplore.ieee.org/document/8922716 | - |
dc.identifier.uri | https://repository.hanyang.ac.kr/handle/20.500.11754/164939 | - |
dc.description.abstract | Irregular quasi-cyclic (QC) low-density parity-check (LDPC) codes with the block dual-diagonal (BDD) parity structure are widely adopted in many communication standards because the BDD structure supports an efficient encoding and many degree-2 variable nodes inside are adequate for the construction of mid- to high-rate codes. However, we observe that low-rate irregular QC LDPC codes with the BDD parity structure inherently contain too many degree-2 variable nodes and suffer from error floors in high signal-to-noise ratio (SNR) region. In this paper, a generalized BDD structure including double-weight circulants as well as circulant permutation matrices is proposed for low-rate irregular QC LDPC codes with low error floors which is achieved with a little bit giving up error performance in the waterfall region. When constructing the parity part of a code with the generalized BDD structure, the portion of double-weight circulants is variable so that the resulting LDPC code can achieve a desired degree distribution including degrees 2 and 3 while supporting the efficient encoding. We show that low-rate QC LDPC codes constructed with the proposed BDD structure have better theoretical properties and lower error floor than those with the conventional BDD structure. | en_US |
dc.description.sponsorship | This research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2018R1D1A1B07051108). This article was presented in part at the 2012 IEEE International Symposium on Information Theory (ISIT). The associate editor coordinating the review of this article and approving it for publication was L. Chen. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | en_US |
dc.subject | Block dual-diagonal (BDD) structure | en_US |
dc.subject | circulant matrices | en_US |
dc.subject | efficient encoding | en_US |
dc.subject | error floor | en_US |
dc.subject | girth | en_US |
dc.subject | minimum Hamming distance | en_US |
dc.subject | protograph | en_US |
dc.subject | quasi-cyclic (QC) low-density parity-check (LDPC) codes | en_US |
dc.title | Variable-Weight Block Dual-Diagonal Structure for Low-Rate QC LDPC Codes with Low Error Floors | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TCOMM.2019.2957474 | - |
dc.relation.page | 1344-1357 | - |
dc.relation.journal | IEEE TRANSACTIONS ON COMMUNICATIONS | - |
dc.contributor.googleauthor | Park, Hosung | - |
dc.contributor.googleauthor | Kwak, Hee-Youl | - |
dc.contributor.googleauthor | Hong, Seokbeom | - |
dc.contributor.googleauthor | No, Jong-Seon | - |
dc.contributor.googleauthor | Shin, Dong-Joon | - |
dc.relation.code | 2020051436 | - |
dc.sector.campus | S | - |
dc.sector.daehak | COLLEGE OF ENGINEERING[S] | - |
dc.sector.department | DEPARTMENT OF ELECTRONIC ENGINEERING | - |
dc.identifier.pid | djshin | - |
dc.identifier.orcid | https://orcid.org/0000-0002-5017-5314 | - |
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