FBGA solder ball defect e ff ect on DDR4 data signal rise time and ISI measured by loading the data line with a capacitor

Abstract

This paper proposes a new method of investigating the effect of void or fracture in FBGA solder ball on the DDR4 data signal rise time and inter-symbol interference (ISI), by loading the data line with a capacitor. A void or fracture in solder ball increases its capacitance which effects the data signal rise time and increases ISI. For measuring ISI large consecutive patterns of 1's or 0's followed by a changing bit are used. However in in-field systems it is not possible to run large patterns of 1's or 0's. So the data line is loaded with a 0.2 pF capacitive load on a UDIMM test card to mimic the increased capacitance due to FBGA solder ball void defect of height 0.2 mm and cross sectional area of 0.0045 mm(2). The loaded line shows increase in rise time of 16 ps. For loaded line the data eye opening is 0.077 UI lesser. This decrease in data eye means more ISI and will cause increase in intermittent errors.