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dc.contributor.author박진석-
dc.date.accessioned2021-03-03T06:32:40Z-
dc.date.available2021-03-03T06:32:40Z-
dc.date.issued2001-08-
dc.identifier.citationIVMC 2001. Proceedings of the 14th International Vacuum Microelectronics Conference (Cat. No.01TH8586), page. 151-152en_US
dc.identifier.isbn0-7803-7197-6-
dc.identifier.urihttps://ieeexplore.ieee.org/document/939698?arnumber=939698&SID=EBSCO:edseee-
dc.identifier.urihttps://repository.hanyang.ac.kr/handle/20.500.11754/160222-
dc.description.abstractA novel process to develop field emitter arrays (FEAs) with sub-micron gate holes for highfrequency (GHz) operation of FEA-based microtriode amplifiers is proposed. The formation of amorphous silicon(a-Si) sidewall may be the key technology used to obtain the emitter structure. Scanning electron microscope (SEM) images, field-emission properties, transconductances, and capacitances of the emitters fabricated are presented. Theoretical considerations on the proposed structure are also discussed.en_US
dc.language.isoen_USen_US
dc.publisherIEEEen_US
dc.titleA novel process of achieving sub-micron gate holes for high-frequency operation of field emitter arraysen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/IVMC.2001.939698-
dc.relation.journalJOURNAL OF VACUUM SCIENCE & TECHNOLOGY B-
dc.contributor.googleauthorUhm, H.S.-
dc.contributor.googleauthorLee, J.H.-
dc.contributor.googleauthorSong, Y.H.-
dc.contributor.googleauthorCho, Y.R.-
dc.contributor.googleauthorWhang, C.S.-
dc.contributor.googleauthorKim, D.H.-
dc.contributor.googleauthorCho, K.I.-
dc.contributor.googleauthorPark, C.K.-
dc.contributor.googleauthorPark, J.S.-
dc.relation.code2009206100-
dc.sector.campusE-
dc.sector.daehakCOLLEGE OF ENGINEERING SCIENCES[E]-
dc.sector.departmentDIVISION OF ELECTRICAL ENGINEERING-
dc.identifier.pidjinsp-
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COLLEGE OF ENGINEERING SCIENCES[E](공학대학) > ELECTRICAL ENGINEERING(전자공학부) > Articles
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